Searched refs:isDead (Results 1 - 25 of 45) sorted by relevance

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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/
H A DDeadMachineInstructionElim.cpp44 bool isDead(const MachineInstr *MI) const;
53 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { function in class:DeadMachineInstructionElim
118 if (isDead(MI)) {
H A DMachineInstrBundle.cpp162 if (MO.isDead()) {
168 if (!MO.isDead())
173 if (!MO.isDead()) {
190 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); local
191 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |
319 if (!MO.isDead())
H A DMachineInstr.cpp130 bool isKill, bool isDead, bool isUndef,
150 IsDead = isDead;
269 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
295 if (isDead()) {
815 if (Check == CheckKillDead && MO.isDead() != OMO.isDead())
1046 /// the specified register or -1 if it is not found. If isDead is true, defs
1050 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, argument
1070 if (Found && (!isDead || MO.isDead()))
129 ChangeToRegister(unsigned Reg, bool isDef, bool isImp, bool isKill, bool isDead, bool isUndef, bool isDebug) argument
[all...]
H A DPHIElimination.cpp229 bool isDead = MPhi->getOperand(0).isDead(); local
297 if (isDead) {
325 if (DestLI.endIndex().isDead()) {
H A DTailDuplication.cpp98 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead,
217 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); local
219 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs);
222 if (isDead) {
454 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, argument
477 if (isDead) {
H A DRegAllocFast.cpp641 } else if (MO.isDead()) {
652 } else if (MO.isDead()) {
668 bool Dead = MO.isDead();
937 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
1023 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ?
H A DMachineCSE.cpp233 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end()))
526 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead())
H A DLiveInterval.cpp54 assert(!Def.isDead() && "Cannot define a value at the dead slot");
364 bool isDead = true;
367 isDead = false;
370 if (isDead) {
H A DVirtRegMap.cpp308 if (MO.isDead())
H A DLiveIntervalAnalysis.cpp934 if (I->end.isDead()) {
946 if (!I->end.isDead()) {
1121 if (LII->end.isDead()) {
H A DMachineLICM.cpp450 if (!MO.isDead())
942 } else if (!MO.isDead()) {
1444 if (MO.isReg() && MO.isDef() && !MO.isDead())
H A DMachineSink.cpp497 } else if (!MO.isDead()) {
H A DMachineVerifier.cpp1060 if (MO->isDead())
1480 if (I->end.isDead()) {
1511 if (MOI->isDef() && MOI->isDead())
1515 if (I->end.isDead()) {
H A DRegisterScavenging.cpp145 if (!isPred && MO.isDead())
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DMachineOperand.h284 bool isDead() const { function in class:llvm::MachineOperand
516 /// operand. Note: This method ignores isKill and isDead properties.
535 bool isKill = false, bool isDead = false,
561 bool isKill = false, bool isDead = false,
571 Op.IsDead = isDead;
H A DMachineInstr.h780 /// the specified register or -1 if it is not found. If isDead is true, defs
786 bool isDead = false, bool Overlap = false,
791 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
793 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
H A DLiveInterval.h606 return EndPoint.isDead();
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCCTRLoops.cpp118 /// isDead - Return true if the instruction is now dead.
119 bool isDead(const MachineInstr *MI,
507 /// isDead returns true if the instruction is dead
508 /// (this was essentially copied from DeadMachineInstructionElim::isDead, but
511 bool PPCCTRLoops::isDead(const MachineInstr *MI, function in class:PPCCTRLoops
565 if (isDead(MI, DeadPhis)) {
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h339 bool isDead = false) {
340 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
H A DThumb2SizeReduction.cpp704 if (HasCC && MI->getOperand(NumOps-1).isDead())
800 if (HasCC && MI->getOperand(NumOps-1).isDead())
869 if (!MO.isDead())
981 if (MO && !MO->isDead())
H A DARMExpandPseudoInsts.cpp387 bool DstIsDead = MI.getOperand(OpIdx).isDead();
519 DstIsDead = MI.getOperand(OpIdx).isDead();
618 bool DstIsDead = MI.getOperand(0).isDead();
866 bool DstIsDead = MI.getOperand(0).isDead();
890 bool DstIsDead = MI.getOperand(0).isDead();
948 bool DstIsDead = MI.getOperand(OpIdx).isDead();
H A DMLxExpansionPass.cpp275 bool DstDead = MI->getOperand(0).isDead();
/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonPeephole.cpp234 false /*isDead*/,
331 Src.isKill(), Src.isDead(), Src.isUndef(),
H A DHexagonHardwareLoops.cpp166 bool isDead(const MachineInstr *MI,
889 /// copied from DeadMachineInstructionElim::isDead, but with special cases
892 bool HexagonHardwareLoops::isDead(const MachineInstr *MI, function in class:HexagonHardwareLoops
944 if (isDead(MI, DeadPhis)) {
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/StaticAnalyzer/Checkers/
H A DSimpleStreamChecker.cpp193 bool IsSymDead = SymReaper.isDead(Sym);

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