/freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
H A D | ScheduleDAG.cpp | 71 if (!Required && I->getSUnit() == D.getSUnit()) 76 SUnit *PredSU = I->getSUnit(); 95 SUnit *N = D.getSUnit(); 141 SUnit *N = D.getSUnit(); 187 SUnit *SuccSU = I->getSUnit(); 203 SUnit *PredSU = I->getSUnit(); 244 SUnit *PredSU = I->getSUnit(); 277 SUnit *SuccSU = I->getSUnit(); 303 unsigned MaxDepth = BestI->getSUnit() [all...] |
H A D | LatencyPriorityQueue.cpp | 59 SUnit &Pred = *I->getSUnit(); 78 if (getSingleUnscheduledPred(I->getSUnit()) == SU) 94 AdjustPriorityOfUnscheduledPreds(I->getSUnit());
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H A D | ScheduleDAGInstrs.cpp | 422 SUnit *DefSU = getSUnit(Def); 599 iterateChainSucc (AA, MFI, SUa, I->getSUnit(), ExitSU, Depth, Visited); 630 iterateChainSucc (AA, MFI, SU, J->getSUnit(), 1080 unsigned PredNum = PI->getSUnit()->NodeNum; 1108 += R.DFSNodeData[PredDep.getSUnit()->NodeNum].InstrCount; 1114 ConnectionPairs.push_back(std::make_pair(PredDep.getSUnit(), Succ)); 1164 const SUnit *PredSU = PredDep.getSUnit(); 1238 if (SI->getKind() == SDep::Data && !SI->getSUnit()->isBoundaryNode()) 1267 || PredDep.getSUnit()->isBoundaryNode()) { 1271 if (Impl.isVisited(PredDep.getSUnit())) { [all...] |
H A D | MachineScheduler.cpp | 338 if (Topo.IsReachable(PredDep.getSUnit(), SuccSU)) 340 Topo.AddPred(SuccSU, PredDep.getSUnit()); 352 SUnit *SuccSU = SuccEdge->getSUnit(); 386 SUnit *PredSU = PredEdge->getSUnit(); 757 if (SUnit *SU = getSUnit(&(*MI))) 837 if (SI->getSUnit() == SUb) 839 DEBUG(dbgs() << " Copy Succ SU(" << SI->getSUnit()->NodeNum << ")\n"); 840 DAG->addEdge(SI->getSUnit(), SDep(SUb, SDep::Artificial)); 863 ChainPredID = PI->getSUnit()->NodeNum; 1031 SUnit *GlobalSU = DAG->getSUnit(GlobalDe [all...] |
H A D | AggressiveAntiDepBreaker.cpp | 282 const SUnit *PredSU = P->getSUnit(); 295 return (Next) ? Next->getSUnit() : 0; 795 SUnit *NextSU = Edge->getSUnit(); 840 if (P->getSUnit() == NextSU ? 849 if ((P->getSUnit() == NextSU) && (P->getKind() != SDep::Anti) && 854 } else if ((P->getSUnit() != NextSU) &&
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H A D | CriticalAntiDepBreaker.cpp | 132 const SUnit *PredSU = P->getSUnit(); 518 const SUnit *NextSU = Edge->getSUnit(); 542 if (P->getSUnit() == NextSU ?
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H A D | PostRASchedulerList.cpp | 566 SUnit *SuccSU = SuccEdge->getSUnit();
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/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ScheduleDAGInstrs.h | 175 /// getSUnit - Return an existing SUnit for this MI, or NULL. 176 SUnit *getSUnit(MachineInstr *MI) const; 245 /// getSUnit - Return an existing SUnit for this MI, or NULL. 246 inline SUnit *ScheduleDAGInstrs::getSUnit(MachineInstr *MI) const { function in class:llvm::ScheduleDAGInstrs
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H A D | ScheduleDAG.h | 178 //// getSUnit - Return the SUnit to which this edge points. 179 SUnit *getSUnit() const { function in class:llvm::SDep 459 if (Preds[i].getSUnit() == N) 467 if (Succs[i].getSUnit() == N) 637 return Node->Preds[Operand].getSUnit();
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | ResourcePriorityQueue.cpp | 78 SUnit *PredSU = I->getSUnit(); 116 SUnit *SuccSU = I->getSUnit(); 220 SUnit &Pred = *I->getSUnit(); 238 if (getSingleUnscheduledPred(I->getSUnit()) == SU) 282 if (I->getSUnit() == SU) 513 if (I->isCtrl() || (I->getSUnit()->NumRegDefsLeft == 0)) 515 --I->getSUnit()->NumRegDefsLeft; 529 adjustPriorityOfUnscheduledPreds(I->getSUnit());
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H A D | ScheduleDAGFast.cpp | 140 SUnit *PredSU = PredEdge->getSUnit(); 172 LiveRegDefs[I->getReg()] = I->getSUnit(); 196 if (LiveRegCycles[I->getReg()] == I->getSUnit()->getHeight()) { 289 else if (I->getSUnit()->getNode() && 290 I->getSUnit()->getNode()->isOperandOf(LoadNode)) 303 if (ChainPred.getSUnit()) { 322 SUnit *SuccDep = D.getSUnit(); 330 SUnit *SuccDep = D.getSUnit(); 369 SUnit *SuccSU = I->getSUnit(); 406 SUnit *SuccSU = I->getSUnit(); [all...] |
H A D | ScheduleDAGRRList.cpp | 199 Topo.AddPred(SU, D.getSUnit()); 207 Topo.RemovePred(SU, D.getSUnit()); 365 SUnit *PredSU = PredEdge->getSUnit(); 535 assert((!RegDef || RegDef == SU || RegDef == I->getSUnit()) && 537 LiveRegDefs[I->getReg()] = I->getSUnit(); 791 SUnit *PredSU = PredEdge->getSUnit(); 813 assert(LiveRegDefs[I->getReg()] == I->getSUnit() && 859 I->getSUnit()->getHeight() < LiveRegGens[I->getReg()]->getHeight()) 860 LiveRegGens[I->getReg()] = I->getSUnit(); 1025 else if (isOperandOf(I->getSUnit(), LoadNod [all...] |
H A D | ScheduleDAGVLIW.cpp | 116 SUnit *SuccSU = D.getSUnit();
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H A D | ScheduleDAGSDNodes.cpp | 764 if (I->getSUnit()->CopyDstRC) { 766 DenseMap<SUnit*, unsigned>::iterator VRI = VRBaseMap.find(I->getSUnit());
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/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonMachineScheduler.cpp | 75 if (I->getSUnit() == SU) 225 unsigned PredReadyCycle = I->getSUnit()->TopReadyCycle; 244 unsigned SuccReadyCycle = I->getSUnit()->BotReadyCycle; 426 SUnit &Pred = *I->getSUnit(); 444 SUnit &Succ = *I->getSUnit(); 507 if (getSingleUnscheduledPred(I->getSUnit()) == SU) 513 if (getSingleUnscheduledSucc(I->getSUnit()) == SU)
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H A D | HexagonVLIWPacketizer.cpp | 2542 if ((PacketSU->Succs[i].getSUnit() == PacketSUDep) && 2602 if (PacketSU->Succs[i].getSUnit() == SU && 2837 if (SUJ->Succs[i].getSUnit() != SUI) {
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/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | R600Packetizer.cpp | 187 if (Dep.getSUnit() != SUI)
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