/freebsd-10.0-release/contrib/llvm/include/llvm/ADT/ |
H A D | StringSwitch.h | 90 template<unsigned N0, unsigned N1, unsigned N2> 92 const char (&S2)[N2], const T& Value) { 96 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3> 98 const char (&S2)[N2], const char (&S3)[N3], 103 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4> 105 const char (&S2)[N2], const char (&S3)[N3],
|
/freebsd-10.0-release/share/examples/netgraph/ |
H A D | virtual.chain | 232 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 234 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 236 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
|
H A D | virtual.lan | 225 M4=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 227 M5=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \ 229 M6=`od -An -N2 -i /dev/random | sed -e 's/ //g' | \
|
/freebsd-10.0-release/crypto/openssl/crypto/bn/asm/ |
H A D | ppc64-mont.pl | 152 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 348 lfd $N2,`$FRAME+112`($sp) 356 fcfid $N2,$N2 375 stfd $N2,56($nap_d) ; save n[j+1] in double format 389 fmadd $T2a,$N2,$na,$T2a 390 fmadd $T2b,$N2,$nb,$T2b 400 fmadd $T3a,$N2,$nc,$T3a 401 fmadd $T3b,$N2,$nd,$T3b 470 lfd $N2,` [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 1034 SDValue N2 = N->getOperand(2); local 1041 if (SelectDirectAddr(N2, Addr)) { 1069 ? SelectADDRsi64(N2.getNode(), N2, Base, Offset) 1070 : SelectADDRsi(N2.getNode(), N2, Base, Offset)) { 1098 ? SelectADDRri64(N2.getNode(), N2, Base, Offset) 1099 : SelectADDRri(N2.getNode(), N2, Bas 1253 SDValue N2; local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 1288 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1289 // the shuffle mask M that point at N1 to point at N2, and indices that point 1290 // N2 to point at N1. 1291 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { argument 1292 std::swap(N1, N2); 1303 SDValue N2, const int *Mask) { 1304 assert(N1.getValueType() == N2.getValueType() && "Invalid VECTOR_SHUFFLE"); 1311 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1324 if (N1 == N2) { 1325 N2 1302 getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, const int *Mask) argument 1557 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, DebugLoc dl) argument 2796 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2) argument 3259 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument 3349 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument 3356 getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument 4802 getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, SDValue N1, SDValue N2) argument 4808 getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3) argument 4814 getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument 4821 getNode(unsigned Opcode, DebugLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument [all...] |
H A D | DAGCombiner.cpp | 255 SDValue SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2); 256 SDValue SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2, 570 SDValue N0, N1, N2; local 571 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) 4085 SDValue N2 = N->getOperand(2); local 4088 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2); 4093 if (N1 == N2) 4100 return N2; 4103 return DAG.getNode(ISD::OR, N->getDebugLoc(), VT, N0, N2); 4126 return DAG.getNode(ISD::AND, N->getDebugLoc(), VT, NOTNode, N2); 4170 SDValue N2 = N->getOperand(2); local 4210 SDValue N2 = N->getOperand(2); local 6214 SDValue N2 = N->getOperand(2); local 6755 SDValue N2 = N->getOperand(2); local 9566 SimplifySelect(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2) argument 9711 SimplifySelectCC(DebugLoc DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument [all...] |
H A D | InstrEmitter.cpp | 515 SDValue N2 = Node->getOperand(2); 516 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue();
|
H A D | TargetLowering.cpp | 1840 SDValue N2 = N->getOperand(1); local 1842 ConstantSDNode *V = dyn_cast<ConstantSDNode>(N2); 1847 } else if (isGAPlusOffset(N2.getNode(), GA, Offset)) {
|
H A D | LegalizeDAG.cpp | 91 SDValue N1, SDValue N2, 185 SDValue N1, SDValue N2, 194 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]); 208 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); 184 ShuffleWithNarrowerEltType(EVT NVT, EVT VT, DebugLoc dl, SDValue N1, SDValue N2, ArrayRef<int> Mask) const argument
|
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 496 SDValue getVectorShuffle(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, 557 SDValue getNode(unsigned Opcode, DebugLoc DL, EVT VT, SDValue N1, SDValue N2); 559 SDValue N1, SDValue N2, SDValue N3); 561 SDValue N1, SDValue N2, SDValue N3, SDValue N4); 563 SDValue N1, SDValue N2, SDValue N3, SDValue N4, 579 SDValue N1, SDValue N2); 581 SDValue N1, SDValue N2, SDValue N3); 583 SDValue N1, SDValue N2, SDValue N3, SDValue N4); 585 SDValue N1, SDValue N2, SDValue N3, SDValue N4, 1001 SDValue N2, IS [all...] |
H A D | SelectionDAGNodes.h | 1122 ShuffleVectorSDNode(EVT VT, DebugLoc dl, SDValue N1, SDValue N2, argument 1125 InitOperands(Ops, N1, N2);
|
/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, 354 SDValue N1, SDValue N2, 367 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; 353 SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, unsigned Opc16) argument
|
/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1314 SDValue N2 = N->getOperand(2); local 1321 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); 1326 SDValue Result = DAG.getNode(ISD::AND, dl, VT, N2, 1338 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1341 SDValue Result = DAG.getNode(ISD::ADD, dl, VT, N0, N2); 1351 SDValue N2 = N->getOperand(2); local 1361 DAG.ComputeMaskedBits(N2, KnownZero, KnownOne); 1363 SDValue Borrow = N2; 1365 DAG.getConstant(0, VT), N2); 1377 DAG.ComputeMaskedBits(N2, KnownZer 1390 SDValue N2 = N->getOperand(2); local [all...] |
/freebsd-10.0-release/contrib/ntp/ntpd/ |
H A D | refclock_wwv.c | 428 #define N2 (N15 / 2) /* space (-1) */ macro 431 {N2, N2, 0, 0}, /* 0 */ 432 {P2, N2, 0, 0}, /* 1 */ 433 {N2, P2, 0, 0}, /* 2 */
|
/freebsd-10.0-release/contrib/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 1890 // 0 <= i <= N1 and some 0 <= j <= N2, where N1 and N2 are the (normalized) 1901 // a1*0 - a2*N2 <= c2 - c1 <= a1*N1 - a2*0 1902 // -a2*N2 <= c2 - c1 <= a1*N1 1905 // a1*0 - a2*0 <= c2 - c1 <= a1*N1 - a2*N2 1906 // 0 <= c2 - c1 <= a1*N1 - a2*N2 1909 // a1*N1 - a2*N2 <= c2 - c1 <= a1*0 - a2*0 1910 // a1*N1 - a2*N2 <= c2 - c1 <= 0 1913 // a1*N1 - a2*0 <= c2 - c1 <= a1*0 - a2*N2 1914 // a1*N1 <= c2 - c1 <= -a2*N2 1931 const SCEV *N2 = collectUpperBound(Loop2, A1->getType()); local [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 3738 /// vrev: N2 = [b1 b0 b3 b2 b5 b4 b7 b6] 3741 /// N3=N1+N2 = [k0 k0 k1 k1 k2 k2 k3 k3] (k0 = b0+b1 = bit-count of 16-bit v0, 3750 SDValue N2 = DAG.getNode(ARMISD::VREV16, DL, VT8Bit, N1); local 3751 SDValue N3 = DAG.getNode(ISD::ADD, DL, VT8Bit, N1, N2); 3794 /// N2 =+[k1 k3 k0 k2 ] 3810 SDValue N2 = DAG.getNode(ARMISD::VUZP, DL, VT16Bit, N1, N1); local 3813 SDValue Extended = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::v4i32, N2); 3817 SDValue Extracted = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, MVT::v4i16, N2, 5493 SDValue N2; local 5505 N2 5536 SDValue N2, N3; local 5571 SDValue N2, N3; local 7636 SDValue N2 = N->getOperand(2); local [all...] |
H A D | ARMISelDAGToDAG.cpp | 2707 SDValue N2 = N0.getOperand(1); local 2708 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2); 2821 SDValue N2 = N->getOperand(2); local 2825 assert(N2.getOpcode() == ISD::Constant); 2829 cast<ConstantSDNode>(N2)->getZExtValue()),
|
/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 924 SDValue N2 = N->getOperand(2); local 925 if (N000 == N2 && 948 SDValue N2 = N->getOperand(2); local 949 if (N000 == N2 &&
|
/freebsd-10.0-release/sys/dev/hptmv/ |
H A D | amd64-elf.raid.o.uu | 76 M``-V&TB)[DR)[^@`````]H62````!'0'@(N2````!$'_Q`^V0WA$.>!_P^DO 391 M8$B)W^@%Y?__28G:OP`````/MW5(NP````!!N2````!!NP$```"#_Q]W/P^V 399 MW^B@X___28G:OP`````/MW5(NP````!!N2````!!NP$```"#_Q]W/P^VPTF- 435 M``^WO)U"#```NP````!!N2````!!N@$```"#^A]W1`^VPTF--(1$B<DIT3GY
|
/freebsd-10.0-release/contrib/llvm/utils/TableGen/ |
H A D | CodeGenDAGPatterns.cpp | 2081 TreePatternNode *N1 = Nodes[i], *N2 = Nodes[i+1]; local 2082 assert(N1->getNumTypes() == 1 && N2->getNumTypes() == 1 && 2085 MadeChange |= N1->UpdateNodeType(0, N2->getExtType(0), *this); 2086 MadeChange |= N2->UpdateNodeType(0, N1->getExtType(0), *this);
|
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 7265 SDValue N2 = Op.getOperand(2); local 7271 isa<ConstantSDNode>(N2)) { 7284 if (N2.getValueType() != MVT::i32) 7285 N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getZExtValue()); 7286 return DAG.getNode(Opc, dl, VT, N0, N1, N2); 7289 if (EltVT == MVT::f32 && isa<ConstantSDNode>(N2)) { 7298 N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getZExtValue() << 4); 7301 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2); 7319 SDValue N2 = Op.getOperand(2); local [all...] |
/freebsd-10.0-release/sys/contrib/dev/ipw/ |
H A D | ipw2100-1.3-i.fw.uu | 258 M?N2(`("C'Q``+@B0!P``(``4`$X(&`!N"%0`#@@2@!\2'`".""``K@@D`,X(
|
H A D | ipw2100-1.3.fw.uu | 258 M?N2(`("C'Q``+@B0!P``(``4`$X(&`!N"%0`#@@2@!\2'`".""``K@@D`,X(
|
/freebsd-10.0-release/sys/dev/hptrr/ |
H A D | i386-elf.hptrr_lib.o.uu | 3211 M=N2#[`Q7Z$?V__]7Z!7W__^#Q!2#OP@E```!=0U7Z!?W__^#Q`3K"XGV5^@V 5991 M=N2+B)0```"%R77:Z]"#[!2+1"08BU`(B8(0`0``C8(,`0``QX(,`0``Z.8# 6332 M10B#Q!"+7"0PB,%FBT,N2"-$)"!FB44.9HM3+F8IPF8Y^F;'11(```^#_`(` 6696 M=?J_`````(N4)(`````/MUH0O@````"#_Q]W28GQ#[;!C52$4(G]N2`````I 6995 M``")1"08#[=<)#(/MW80*=ZR`(/['W=*#[;"BTPD&(T\@8G=N2`````IV3GQ 7001 MMU@0O@````"#_Q]W3(GR#[;"BTPD%(T4@8G]N2`````I^3G9=@*)V8/Y('4( 7004 M````B?:#_Q]W3(GR#[;"BTPD$(T4@8G]N2`````I^3G9=@*)V8/Y('4(QP+_
|