Searched refs:MachineInstrBuilder (Results 1 - 25 of 56) sorted by relevance

123

/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCInstrBuilder.h11 // MachineInstrBuilder.h file to simplify generating frame and constant pool
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
32 static inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h45 class MachineInstrBuilder { class in namespace:llvm
49 MachineInstrBuilder() : MF(0), MI(0) {} function in class:llvm::MachineInstrBuilder
51 /// Create a MachineInstrBuilder for manipulating an existing instruction.
53 MachineInstrBuilder(MachineFunction &F, MachineInstr *I) : MF(&F), MI(I) {} function in class:llvm::MachineInstrBuilder
64 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
83 const MachineInstrBuilder &addImm(int64_t Val) const {
88 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
93 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
98 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
104 const MachineInstrBuilder
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86InstrBuilder.h11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
89 static inline const MachineInstrBuilder &
90 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
97 static inline const MachineInstrBuilder &
98 addOffset(const MachineInstrBuilder &MIB, int Offset) {
106 static inline const MachineInstrBuilder &
107 addRegOffset(const MachineInstrBuilder &MIB,
114 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder
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/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZInstrBuilder.h11 // MachineInstrBuilder.h file to handle SystemZ'isms in a clean way.
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 static inline const MachineInstrBuilder &
27 addFrameReference(const MachineInstrBuilder &MIB, int FI) {
H A DSystemZFrameLowering.cpp102 static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB,
172 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::STMG));
242 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(SystemZ::LMG));
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.h25 class MachineInstrBuilder;
53 MachineInstrBuilder &MIB,
66 void AddRegisterOperand(MachineInstrBuilder &MIB,
77 void AddOperand(MachineInstrBuilder &MIB,
H A DInstrEmitter.cpp22 #include "llvm/CodeGen/MachineInstrBuilder.h"
207 MachineInstrBuilder &MIB,
295 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB,
357 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB,
540 MachineInstrBuilder MIB =
597 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg);
647 MachineInstrBuilder MIB = BuildMI(*MF, DL, II);
736 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II);
888 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(),
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/
H A DSIInstrInfo.h63 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
69 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
H A DR600InstrInfo.h31 class MachineInstrBuilder;
145 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
150 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
166 MachineInstrBuilder buildDefaultInstruction(MachineBasicBlock &MBB,
H A DAMDGPUIndirectAddressing.cpp23 #include "llvm/CodeGen/MachineInstrBuilder.h"
113 MachineInstrBuilder MOV = TII->buildIndirectWrite(BB, I,
187 MachineInstrBuilder Phi = BuildMI(MBB, MBB.begin(),
280 MachineInstrBuilder Sequence = BuildMI(MBB, I, MBB.findDebugLoc(I),
301 MachineInstrBuilder Mov = TII->buildIndirectRead(BB, I,
H A DSIInstrInfo.cpp18 #include "llvm/CodeGen/MachineInstrBuilder.h"
160 MachineInstrBuilder Builder = BuildMI(MBB, MI, DL,
203 MachineInstrBuilder MIB(*MF, MI);
255 MachineInstrBuilder SIInstrInfo::buildIndirectWrite(
263 MachineInstrBuilder SIInstrInfo::buildIndirectRead(
H A DAMDGPUInstrInfo.h38 class MachineInstrBuilder;
176 virtual MachineInstrBuilder buildIndirectWrite(MachineBasicBlock *MBB,
184 virtual MachineInstrBuilder buildIndirectRead(MachineBasicBlock *MBB,
H A DR600InstrInfo.cpp22 #include "llvm/CodeGen/MachineInstrBuilder.h"
80 MachineInstrBuilder MIB(*MF, MI);
553 MachineInstrBuilder MIB(*MI->getParent()->getParent(), MI);
648 MachineInstrBuilder R600InstrInfo::buildIndirectWrite(MachineBasicBlock *MBB,
657 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV,
664 MachineInstrBuilder R600InstrInfo::buildIndirectRead(MachineBasicBlock *MBB,
673 MachineInstrBuilder Mov = buildDefaultInstruction(*MBB, I, AMDGPU::MOV,
690 MachineInstrBuilder R600InstrInfo::buildDefaultInstruction(MachineBasicBlock &MBB,
696 MachineInstrBuilder MIB = BuildMI(MBB, I, MBB.findDebugLoc(I), get(Opcode),
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseInstrInfo.h20 #include "llvm/CodeGen/MachineInstrBuilder.h"
144 const MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
328 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) {
333 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) {
338 const MachineInstrBuilder &AddDefaultT1CC(const MachineInstrBuilder &MIB,
344 const MachineInstrBuilder
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H A DARMExpandPseudoInsts.cpp25 #include "llvm/CodeGen/MachineInstrBuilder.h"
55 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
73 MachineInstrBuilder &UseMI,
74 MachineInstrBuilder &DefMI) {
383 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
448 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
500 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
584 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
621 MachineInstrBuilder LO1
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H A DThumb1FrameLowering.cpp18 #include "llvm/CodeGen/MachineInstrBuilder.h"
318 MachineInstrBuilder MIB =
342 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
381 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
H A DARMInstrInfo.cpp23 #include "llvm/CodeGen/MachineInstrBuilder.h"
125 MachineInstrBuilder MIB = BuildMI(FirstMBB, MBBI, DL,
H A DThumb2InstrInfo.cpp20 #include "llvm/CodeGen/MachineInstrBuilder.h"
157 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8));
198 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8));
314 MachineInstrBuilder MIB =
446 MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI);
H A DThumb1RegisterInfo.cpp24 #include "llvm/CodeGen/MachineInstrBuilder.h"
130 MachineInstrBuilder MIB =
242 const MachineInstrBuilder MIB =
261 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
269 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
352 MachineInstrBuilder MIB(*MBB.getParent(), &MI);
563 MachineInstrBuilder MIB(*MBB.getParent(), &MI);
H A DARMBaseInstrInfo.cpp25 #include "llvm/CodeGen/MachineInstrBuilder.h"
473 MachineInstrBuilder(*MI->getParent()->getParent(), MI)
687 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc), DestReg);
725 MachineInstrBuilder Mov;
756 const MachineInstrBuilder &
757 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg,
805 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::STRD));
814 MachineInstrBuilder MIB =
849 MachineInstrBuilder MIB =
870 MachineInstrBuilder MI
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H A DARMFastISel.cpp28 #include "llvm/CodeGen/MachineInstrBuilder.h"
224 const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
226 const MachineInstrBuilder &MIB,
271 const MachineInstrBuilder &
272 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
672 MachineInstrBuilder MIB;
692 MachineInstrBuilder MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt,
703 MachineInstrBuilder MIB;
957 const MachineInstrBuilder
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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/
H A DMips16InstrInfo.cpp20 #include "llvm/CodeGen/MachineInstrBuilder.h"
91 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
198 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16),
202 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16),
206 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::SwRxSpImmX16),
238 MachineInstrBuilder MIB1 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16),
242 MachineInstrBuilder MIB0 = BuildMI(MBB, I, DL, get(Mips::Move32R16),
245 MachineInstrBuilder MIB2 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16),
249 MachineInstrBuilder MIB3 = BuildMI(MBB, I, DL, get(Mips::LwRxSpImmX16),
277 MachineInstrBuilder MIB
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H A DMipsInstrInfo.cpp20 #include "llvm/CodeGen/MachineInstrBuilder.h"
68 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE))
109 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/
H A DMachineSSAUpdater.cpp19 #include "llvm/CodeGen/MachineInstrBuilder.h"
112 MachineInstrBuilder InsertNewDef(unsigned Opcode,
186 MachineInstrBuilder InsertedPHI = InsertNewDef(TargetOpcode::PHI, BB,
318 MachineInstrBuilder(*Pred->getParent(), PHI).addReg(Val).addMBB(Pred);
/freebsd-10.0-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp24 #include "llvm/CodeGen/MachineInstrBuilder.h"
123 MachineInstrBuilder MIB = BuildMI(MF, DL, get(AArch64::DBG_VALUE))
312 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
319 MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
417 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(StoreOp));
463 MachineInstrBuilder NewMI = BuildMI(MBB, MBBI, DL, get(LoadOp), DestReg);

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