/freebsd-10-stable/contrib/llvm/include/llvm/ADT/ |
H A D | StringSwitch.h | 84 template<unsigned N0, unsigned N1> 85 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], 90 template<unsigned N0, unsigned N1, unsigned N2> 91 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], 96 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3> 97 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1], 103 template<unsigned N0, unsigned N1, unsigned N2, unsigned N3, unsigned N4> 104 StringSwitch& Cases(const char (&S0)[N0], const char (&S1)[N1],
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/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 268 SDValue SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2); 269 SDValue SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2, 272 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, 280 SDValue MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1, 282 SDValue MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1); 600 SDValue N0, N1, N2; local 601 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode()->hasOneUse()) 607 SDValue N0, SDValue N1) { 610 if (isa<ConstantSDNode>(N1)) { 615 cast<ConstantSDNode>(N1)); 606 ReassociateOps(unsigned Opc, SDLoc DL, SDValue N0, SDValue N1) argument 855 SDValue N1 = Op.getOperand(1); local 1254 SDValue N1 = N->getOperand(1); local 1380 combineShlAddConstant(SDLoc DL, SDValue N0, SDValue N1, SelectionDAG &DAG) argument 1403 SDValue N1 = N->getOperand(1); local 1573 SDValue N1 = N->getOperand(1); local 1614 SDValue N1 = N->getOperand(1); local 1645 SDValue N1 = N->getOperand(1); local 1738 SDValue N1 = N->getOperand(1); local 1771 SDValue N1 = N->getOperand(1); local 1799 SDValue N1 = N->getOperand(1); local 1919 SDValue N1 = N->getOperand(1); local 2003 SDValue N1 = N->getOperand(1); local 2055 SDValue N1 = N->getOperand(1); local 2097 SDValue N1 = N->getOperand(1); local 2150 SDValue N1 = N->getOperand(1); local 2188 SDValue N1 = N->getOperand(1); local 2375 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); local 2494 SDValue N1 = N->getOperand(1); local 2883 MatchBSwapHWordLow(SDNode *N, SDValue N0, SDValue N1, bool DemandHighBits) argument 3060 MatchBSwapHWord(SDNode *N, SDValue N0, SDValue N1) argument 3132 SDValue N1 = N->getOperand(1); local 3426 SDValue N1 = N->getOperand(1); local 3632 SDValue N1 = N->getOperand(1); local 3789 SDValue N1 = N->getOperand(1); local 3940 SDValue N1 = N->getOperand(1); local 4191 SDValue N1 = N->getOperand(1); local 4293 SDValue N1 = N->getOperand(1); local 4361 SDValue N1 = N->getOperand(1); local 5368 SDValue N1 = N->getOperand(1); local 5976 SDValue N1 = N->getOperand(1); local 6186 SDValue N1 = N->getOperand(1); local 6277 SDValue N1 = N->getOperand(1); local 6341 SDValue N1 = N->getOperand(1); local 6416 SDValue N1 = N->getOperand(1); local 6470 SDValue N1 = N->getOperand(1); local 6484 SDValue N1 = N->getOperand(1); local 6659 SDValue N1 = N->getOperand(1); local 6875 SDValue N1 = N->getOperand(1); local 9954 SDValue N1 = N->getOperand(1); local 10005 SDValue N1 = N->getOperand(1); local 10298 SimplifySelect(SDLoc DL, SDValue N0, SDValue N1, SDValue N2) argument 10443 SimplifySelectCC(SDLoc DL, SDValue N0, SDValue N1, SDValue N2, SDValue N3, ISD::CondCode CC, bool NotExtCompare) argument 10732 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, SDLoc DL, bool foldBooleans) argument [all...] |
H A D | TargetLowering.cpp | 1121 TargetLowering::SimplifySetCC(EVT VT, SDValue N0, SDValue N1, argument 1145 return DAG.getSetCC(dl, VT, N1, N0, SwappedCC); 1147 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.getNode())) { 1415 return DAG.getSetCC(dl, VT, Val, N1, 1473 DAG.getConstant(C1-1, N1.getValueType()), 1481 DAG.getConstant(C1+1, N1.getValueType()), 1496 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); 1499 return DAG.getSetCC(dl, VT, N0, N1, ISD::SETNE); 1519 DAG.getConstant(0, N1.getValueType()), 1527 N1 1910 SDValue N1 = N->getOperand(0); local [all...] |
H A D | SelectionDAG.cpp | 1345 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in 1346 // the shuffle mask M that point at N1 to point at N2, and indices that point 1347 // N2 to point at N1. 1348 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) { argument 1349 std::swap(N1, N2); 1359 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, argument 1361 assert(VT == N1.getValueType() && VT == N2.getValueType() && 1365 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF) 1378 if (N1 == N2) { 1385 if (N1 1633 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl) argument 2886 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2) argument 3352 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument 3459 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument 3466 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument 4953 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1) argument 4959 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2) argument 4965 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3) argument 4971 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument 4978 getNode(unsigned Opcode, SDLoc DL, SDVTList VTList, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument [all...] |
H A D | InstrEmitter.cpp | 529 SDValue N1 = Node->getOperand(1); 567 AddOperand(MIB, N1, 0, 0, VRBaseMap, /*IsDebug=*/false,
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H A D | LegalizeDAG.cpp | 95 SDValue N1, SDValue N2, 189 SDValue N1, SDValue N2, 198 return DAG.getVectorShuffle(NVT, dl, N1, N2, &Mask[0]); 212 return DAG.getVectorShuffle(NVT, dl, N1, N2, &NewMask[0]); 188 ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, SDValue N1, SDValue N2, ArrayRef<int> Mask) const argument
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/freebsd-10-stable/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 120 SDNode *SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, 355 SDValue N1, SDValue N2, 357 if (N1.getOpcode() == ISD::LOAD && 358 N1.hasOneUse() && 359 IsLegalToFold(N1, Op, Op, OptLevel)) { 360 LoadSDNode *LD = cast<LoadSDNode>(N1); 367 MemRefs0[0] = cast<MemSDNode>(N1)->getMemOperand(); 375 ReplaceUses(SDValue(N1.getNode(), 2), SDValue(ResNode, 2)); 377 ReplaceUses(SDValue(N1.getNode(), 1), SDValue(ResNode, 1)); 354 SelectIndexedBinOp(SDNode *Op, SDValue N1, SDValue N2, unsigned Opc8, unsigned Opc16) argument
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/freebsd-10-stable/crypto/openssl/crypto/bn/asm/ |
H A D | ppc64-mont.pl | 152 $N0="f20"; $N1="f21"; $N2="f22"; $N3="f23"; 347 lfd $N1,`$FRAME+104`($sp) 355 fcfid $N1,$N1 372 stfd $N1,48($nap_d) 387 fmadd $T1a,$N1,$na,$T1a 388 fmadd $T1b,$N1,$nb,$T1b 398 fmadd $T2a,$N1,$nc,$T2a 399 fmadd $T2b,$N1,$nd,$T2b 469 lfd $N1,` [all...] |
/freebsd-10-stable/sys/boot/i386/boot2/ |
H A D | sio.S | 19 .set SIO_FMT,SIOFMT # 8N1
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/freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 3995 /// vcnt: N1 = [b0 b1 b2 b3 b4 b5 b6 b7] (bi = bit-count of 8-bit element wi) 3999 /// N3=N1+N2 = [k0 k0 k1 k1 k2 k2 k3 k3] (k0 = b0+b1 = bit-count of 16-bit v0, 4007 SDValue N1 = DAG.getNode(ISD::CTPOP, DL, VT8Bit, N0); local 4008 SDValue N2 = DAG.getNode(ARMISD::VREV16, DL, VT8Bit, N1); 4009 SDValue N3 = DAG.getNode(ISD::ADD, DL, VT8Bit, N1, N2); 4050 /// N1 =+[k1 k0 k3 k2 ] 4067 SDValue N1 = DAG.getNode(ISD::ADD, DL, VT16Bit, Counts16, N0); local 4068 SDValue N2 = DAG.getNode(ARMISD::VUZP, DL, VT16Bit, N1, N1); 5676 SDNode *N1 local 5687 SDNode *N1 = N->getOperand(1).getNode(); local 5701 SDNode *N1 = Op.getOperand(1).getNode(); local 5799 LowerSDIV_v4i16(SDValue N0, SDValue N1, SDLoc dl, SelectionDAG &DAG) argument 5842 SDValue N1 = Op.getOperand(1); local 5877 SDValue N1 = Op.getOperand(1); local 8093 SDValue N1 = N->getOperand(1); local 8186 SDValue N1 = N->getOperand(1); local 8202 AddCombineToVPADDL(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 8444 PerformADDCombineWithOperands(SDNode *N, SDValue N0, SDValue N1, TargetLowering::DAGCombinerInfo &DCI, const ARMSubtarget *Subtarget) argument 8467 SDValue N1 = N->getOperand(1); local 8483 SDValue N1 = N->getOperand(1); local 8517 SDValue N1 = N->getOperand(1); local 8888 SDValue N1 = N->getOperand(1); local 9919 SDValue N1 = N->getOperand(1); local [all...] |
H A D | ARMISelDAGToDAG.cpp | 348 SDValue N1 = N->getOperand(1); local 350 if (!isOpcWithIntImmediate(N1.getNode(), ISD::AND, And_imm)) { 352 std::swap(N0, N1); 375 SDValue Srl = N1.getOperand(0); 399 N1 = CurDAG->getNode(ISD::AND, SDLoc(N1), MVT::i32, 401 N1 = CurDAG->getNode(ISD::SHL, SDLoc(N1), MVT::i32, 402 N1, CurDAG->getConstant(TZ, MVT::i32)); 403 CurDAG->UpdateNodeOperands(N, N0, N1); 1043 SDValue N1 = N.getOperand(1); local 2610 SDValue N0 = N->getOperand(0), N1 = N->getOperand(1); local 2728 SDValue N1 = N->getOperand(1); local [all...] |
/freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 250 SDValue N1 = N->getOperand(1); local 256 if (SelectDirectAddr(N1, Addr)) { 284 ? SelectADDRsi64(N1.getNode(), N1, Base, Offset) 285 : SelectADDRsi(N1.getNode(), N1, Base, Offset)) { 313 ? SelectADDRri64(N1.getNode(), N1, Base, Offset) 314 : SelectADDRri(N1.getNode(), N1, Bas 1347 SDValue N1 = N->getOperand(1); local [all...] |
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 542 SDValue getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, 603 SDValue getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2); 605 SDValue N1, SDValue N2, SDValue N3); 607 SDValue N1, SDValue N2, SDValue N3, SDValue N4); 609 SDValue N1, SDValue N2, SDValue N3, SDValue N4, 625 SDValue N1, SDValue N2); 627 SDValue N1, SDValue N2, SDValue N3); 629 SDValue N1, SDValue N2, SDValue N3, SDValue N4); 631 SDValue N1, SDValue N2, SDValue N3, SDValue N4, 1070 SDValue FoldSetCC(EVT VT, SDValue N1, [all...] |
H A D | SelectionDAGNodes.h | 1213 ShuffleVectorSDNode(EVT VT, unsigned Order, DebugLoc dl, SDValue N1, argument 1216 InitOperands(Ops, N1, N2);
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/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 442 SDValue N1 = LD->getOperand(1); local 446 if (SelectADDRriS11_2(N1, CPTmpN1_0, CPTmpN1_1) && 447 N1.getNode()->getValueType(0) == MVT::i32) { 509 SDValue N1 = LD->getOperand(1); local 513 if (SelectADDRriS11_2(N1, CPTmpN1_0, CPTmpN1_1) && 514 N1.getNode()->getValueType(0) == MVT::i32) { 930 SDValue N1 = N->getOperand(1); local 931 if (N01 == N1) { 941 N1); 954 SDValue N1 local 1662 SDValue N1 = N.getOperand(1); local [all...] |
/freebsd-10-stable/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 582 SDValue N1 = Op.getOperand(1); local 587 OtherOp = N1; 588 } else if (N1.getOpcode() == ISD::ADD) { 589 AddOp = N1; 1397 SDValue N1 = N->getOperand(1); local 1400 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1); 1405 return DAG.getNode(XCoreISD::LADD, dl, DAG.getVTList(VT, VT), N1, N0, N2); 1434 SDValue N1 = N->getOperand(1); local 1437 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1); 1473 SDValue N1 local [all...] |
/freebsd-10-stable/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 2175 SDValue N1 = Node->getOperand(1); local 2184 ConstantSDNode *Cst = dyn_cast<ConstantSDNode>(N1); 2248 SDValue N1 = Node->getOperand(1); local 2263 SDValue Ops[] = {N1, InFlag}; 2275 SDValue N1 = Node->getOperand(1); local 2327 bool foldedLoad = TryFoldLoad(Node, N1, Tmp0, Tmp1, Tmp2, Tmp3, Tmp4); 2332 std::swap(N0, N1); 2341 SDValue Ops[] = { Tmp0, Tmp1, Tmp2, Tmp3, Tmp4, N1.getOperand(0), 2358 ReplaceUses(N1.getValue(1), Chain); 2360 SDValue Ops[] = { N1, InFla 2423 SDValue N1 = Node->getOperand(1); local 2595 SDValue N1 = Node->getOperand(1); local [all...] |
H A D | X86ISelLowering.cpp | 7760 SDValue N1 = Op.getOperand(1); local 7778 if (N1.getValueType() != MVT::i32) 7779 N1 = DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, N1); 7782 return DAG.getNode(Opc, dl, VT, N0, N1, N2); 7796 N1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v4f32, N1); 7797 return DAG.getNode(X86ISD::INSERTPS, dl, VT, N0, N1, N2); 7814 SDValue N1 = Op.getOperand(1); local 7831 V = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, V.getValueType(), V, N1, 17433 SDValue N1 = N->getOperand(1); local 17536 SDValue N1 = N->getOperand(1); local 17675 SDValue N1 = Narrow->getOperand(1); local 17749 SDValue N1 = N->getOperand(1); local 17828 SDValue N1 = N->getOperand(1); local 17858 SDValue N1 = N->getOperand(1); local 18008 SDValue N1 = N->getOperand(1); local 18058 SDValue N1 = N->getOperand(1); local 18759 SDValue N1 = N->getOperand(1); local 19287 SDValue N1 = Op.getOperand(1); local [all...] |
/freebsd-10-stable/contrib/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineMulDivRem.cpp | 515 Value *N1 = dyn_castFNegVal(Opnd1, IgnoreZeroSign); local 518 if (N1) 519 return BinaryOperator::CreateFMul(N0, N1); 1162 Constant *N1 = Constant::getAllOnesValue(I.getType()); local 1163 Value *Add = Builder->CreateAdd(Op1, N1);
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/freebsd-10-stable/contrib/llvm/lib/Analysis/ |
H A D | DependenceAnalysis.cpp | 1895 // 0 <= i <= N1 and some 0 <= j <= N2, where N1 and N2 are the (normalized) 1906 // a1*0 - a2*N2 <= c2 - c1 <= a1*N1 - a2*0 1907 // -a2*N2 <= c2 - c1 <= a1*N1 1910 // a1*0 - a2*0 <= c2 - c1 <= a1*N1 - a2*N2 1911 // 0 <= c2 - c1 <= a1*N1 - a2*N2 1914 // a1*N1 - a2*N2 <= c2 - c1 <= a1*0 - a2*0 1915 // a1*N1 - a2*N2 <= c2 - c1 <= 0 1918 // a1*N1 - a2*0 <= c2 - c1 <= a1*0 - a2*N2 1919 // a1*N1 < 1935 const SCEV *N1 = collectUpperBound(Loop1, A1->getType()); local [all...] |
/freebsd-10-stable/contrib/gdb/gdb/ |
H A D | ada-lang.c | 2524 /* Returns true (non-zero) iff demangled name N0 should appear before N1 */ 2530 mangled_ordered_before (char *N0, char *N1) 2532 if (N1 == NULL) 2541 for (k1 = strlen (N1) - 1; k1 > 0 && isdigit (N1[k1]); k1 -= 1) 2544 && (N1[k1] == '_' || N1[k1] == '$') && N1[k1 + 1] != '\000') 2551 while (N1[n1] == '_' && n1 > 0 && N1[n 2525 mangled_ordered_before(char *N0, char *N1) argument [all...] |
/freebsd-10-stable/contrib/llvm/utils/TableGen/ |
H A D | CodeGenDAGPatterns.cpp | 2078 TreePatternNode *N1 = Nodes[i], *N2 = Nodes[i+1]; local 2079 assert(N1->getNumTypes() == 1 && N2->getNumTypes() == 1 && 2082 MadeChange |= N1->UpdateNodeType(0, N2->getExtType(0), *this); 2083 MadeChange |= N2->UpdateNodeType(0, N1->getExtType(0), *this); 2500 const TreePatternNode *N1 = N->getChild(1); local 2501 if (N1->isLeaf()) 2503 if (N1->getNumChildren() != 1 || !N1->getChild(0)->isLeaf()) 2506 const SDNodeInfo &OpInfo = CDP.getSDNodeInfo(N1->getOperator());
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/freebsd-10-stable/contrib/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 1858 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1,
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/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3396 SDValue N1 = N->getOperand(1); 3397 if (N1.getOpcode() != ISD::AND) 3409 BuildVectorSDNode *BVN1 = dyn_cast<BuildVectorSDNode>(N1->getOperand(1)); 3418 N1->getOperand(0));
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/freebsd-10-stable/sys/dev/hptmv/ |
H A D | amd64-elf.raid.o.uu | 1055 MX0```$R)Y^@`````0;AD````N1`G``"Z`0```+X`````2(G?Z`````"%P'4/ 1474 M9FY396YD0V]M;6%N9`!F1&5296%D5W)I=&4`<&9N1&5V:6-E1F%I;&5D`$-H
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