Searched refs:INTEL_PTE_VALID (Results 1 - 16 of 16) sorted by relevance

/darwin-on-arm/xnu/osfmk/i386/
H A Didle_pt.c30 #define PML4_PROT (INTEL_PTE_VALID | INTEL_PTE_WRITE)
35 #define PDPT_PROT (INTEL_PTE_VALID)
50 #define ID_MAP_2MEG(x) [(x)] = ((((uint64_t)(x)) << 21) | (INTEL_PTE_PS | INTEL_PTE_VALID | INTEL_PTE_WRITE)),
H A Dphys.c170 map = pmap_get_mapwindow(INTEL_PTE_VALID | INTEL_PTE_RW | (i386_ptob(pdst) & PG_FRAME) |
203 map = pmap_get_mapwindow(INTEL_PTE_VALID | INTEL_PTE_RW | (i386_ptob(psrc) & PG_FRAME) |
242 src_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | ((pmap_paddr_t)src64 & PG_FRAME) | INTEL_PTE_REF));
243 dst_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)dst64 & PG_FRAME) | INTEL_PTE_REF | INTEL_PTE_MOD));
275 pmap_store_pte(debugger_ptep, debug_pa | INTEL_PTE_NCACHE | INTEL_PTE_RW | INTEL_PTE_REF| INTEL_PTE_MOD | INTEL_PTE_VALID);
H A Dloose_ends.c126 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)src64 & PG_FRAME) | INTEL_PTE_REF | INTEL_PTE_MOD));
154 src_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | ((pmap_paddr_t)src64 & PG_FRAME) | INTEL_PTE_REF));
155 dst_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)dst64 & PG_FRAME) |
187 dst_map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | ((pmap_paddr_t)dst64 & PG_FRAME) |
238 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF));
271 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_REF));
345 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
372 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (paddr & PG_FRAME) |
555 map = pmap_get_mapwindow((pt_entry_t)(INTEL_PTE_VALID | INTEL_PTE_RW | (src & PG_FRAME) |
598 map = pmap_get_mapwindow((pt_entry_t)(i386_ptob(atop_64(addr)) | INTEL_PTE_VALID));
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H A Dhibernate_restore.c84 phys = ((phys & ~((uint64_t)I386_LPGMASK)) | INTEL_PTE_PS | INTEL_PTE_VALID | INTEL_PTE_WRITE);
H A Di386_init.c158 base[index] = src | prot | INTEL_PTE_VALID;
221 | INTEL_PTE_VALID
230 | INTEL_PTE_VALID
238 | INTEL_PTE_VALID
271 INTEL_PTE_VALID | INTEL_PTE_NX | INTEL_PTE_WRITE;
273 INTEL_PTE_VALID | INTEL_PTE_NX; /* read-only */
H A Dpmap_x86_common.c109 while (0 == npde || ((*npde & INTEL_PTE_VALID) == 0)) {
122 while (0 == npde || ((*npde & INTEL_PTE_VALID) == 0)) {
310 if ((pdep != PD_ENTRY_NULL) && ((pde = *pdep) & INTEL_PTE_VALID)) {
317 if ((PT_ENTRY_NULL != ptp) && (((pte = *ptp) & INTEL_PTE_VALID) != 0)) {
561 template = pa_to_pte(pa) | INTEL_PTE_VALID;
632 pmap_update_pte(pte, INTEL_PTE_VALID, 0);
770 template = pa_to_pte(pa) | INTEL_PTE_VALID;
906 if ((p & INTEL_PTE_VALID) == 0)
910 pmap_update_pte(cpte, INTEL_PTE_VALID, 0);
1068 if (pde && (*pde & INTEL_PTE_VALID)) {
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H A Dpmap.c338 if (pml4 && ((*pml4 & INTEL_PTE_VALID))) {
355 newpf | INTEL_PTE_RW | INTEL_PTE_VALID);
384 if (pdpt && ((*pdpt & INTEL_PTE_VALID))) {
400 newpf | INTEL_PTE_RW | INTEL_PTE_VALID);
442 if (pde && ((*pde & INTEL_PTE_VALID))) {
467 newpf | INTEL_PTE_RW | INTEL_PTE_VALID);
545 | INTEL_PTE_VALID
700 (pa & PG_FRAME) | INTEL_PTE_VALID | INTEL_PTE_RW | INTEL_PTE_REF |
702 pmap_store_pte(pdpt, pa | INTEL_PTE_VALID);
789 #define PAGE_BITS INTEL_PTE_VALID|INTEL_PTE_R
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H A Dpmap.h377 #define INTEL_PTE_VALID 0x00000001ULL macro
402 #define pte_kernel_rw(p) ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_RW))
403 #define pte_kernel_ro(p) ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID))
404 #define pte_user_rw(p) ((pt_entry)t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_USER|INTEL_PTE_RW))
405 #define pte_user_ro(p) ((pt_entry_t)(pa_to_pte(p) | INTEL_PTE_VALID|INTEL_PTE_USER))
H A Dcopyio.c403 pentry = (pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME) | INTEL_PTE_RW);
408 pentry = (pt_entry_t)(INTEL_PTE_VALID | (paddr & PG_FRAME));
477 (*(current_cpu_datap()->cpu_physwindow_ptep) & (INTEL_PTE_VALID | PG_FRAME | INTEL_PTE_RW)))
H A Dacpi_wakeup.s203 or $(INTEL_PTE_VALID), %ecx
H A Dpmap_internal.h376 #define PHYS_MANAGED INTEL_PTE_VALID /* page is managed */
1019 if (pml4 && ((*pml4 & INTEL_PTE_VALID))) {
1037 if (pdpt && ((*pdpt & INTEL_PTE_VALID))) {
1071 if (pde && ((*pde & INTEL_PTE_VALID))) {
H A Dstart.s285 mov $EXT(BootPTD) + (INTEL_PTE_VALID), %ecx
H A Dgenassym.c363 DECLARE("INTEL_PTE_VALID", INTEL_PTE_VALID);
520 DECLARE("INTEL_PTE_KERNEL", INTEL_PTE_VALID|INTEL_PTE_WRITE);
/darwin-on-arm/xnu/osfmk/x86_64/
H A Dboot_pt.c46 #define PML4_PROT (INTEL_PTE_VALID | INTEL_PTE_WRITE)
53 #define PDPT_PROT (INTEL_PTE_VALID | INTEL_PTE_WRITE)
68 #define PDT_PROT (INTEL_PTE_PS | INTEL_PTE_VALID | INTEL_PTE_WRITE)
H A Dpmap.c854 if ((*ptep & INTEL_PTE_VALID) == 0)
916 assert((dpte & INTEL_PTE_VALID));
917 if ((dpte & INTEL_PTE_VALID) == 0) {
969 | INTEL_PTE_VALID
1286 if (pde && (*pde & INTEL_PTE_VALID)) {
1298 if (!(*spte & INTEL_PTE_VALID))
1427 | INTEL_PTE_VALID
1516 | INTEL_PTE_VALID
1635 | INTEL_PTE_VALID
1666 | INTEL_PTE_VALID
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/darwin-on-arm/xnu/osfmk/kdp/ml/i386/
H A Dkdp_x86_common.c440 if (0 == pde || ((*pde & INTEL_PTE_VALID) == 0)) {

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