1/*
2 * Copyright (c) 2000 Apple Computer, Inc. All rights reserved.
3 *
4 * @APPLE_OSREFERENCE_LICENSE_HEADER_START@
5 *
6 * This file contains Original Code and/or Modifications of Original Code
7 * as defined in and that are subject to the Apple Public Source License
8 * Version 2.0 (the 'License'). You may not use this file except in
9 * compliance with the License. The rights granted to you under the License
10 * may not be used to create, or enable the creation or redistribution of,
11 * unlawful or unlicensed copies of an Apple operating system, or to
12 * circumvent, violate, or enable the circumvention or violation of, any
13 * terms of an Apple operating system software license agreement.
14 *
15 * Please obtain a copy of the License at
16 * http://www.opensource.apple.com/apsl/ and read it before using this file.
17 *
18 * The Original Code and all software distributed under the License are
19 * distributed on an 'AS IS' basis, WITHOUT WARRANTY OF ANY KIND, EITHER
20 * EXPRESS OR IMPLIED, AND APPLE HEREBY DISCLAIMS ALL SUCH WARRANTIES,
21 * INCLUDING WITHOUT LIMITATION, ANY WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE, QUIET ENJOYMENT OR NON-INFRINGEMENT.
23 * Please see the License for the specific language governing rights and
24 * limitations under the License.
25 *
26 * @APPLE_OSREFERENCE_LICENSE_HEADER_END@
27 */
28/*
29 * @OSF_COPYRIGHT@
30 */
31/*
32 * Mach Operating System
33 * Copyright (c) 1991,1990 Carnegie Mellon University
34 * All Rights Reserved.
35 *
36 * Permission to use, copy, modify and distribute this software and its
37 * documentation is hereby granted, provided that both the copyright
38 * notice and this permission notice appear in all copies of the
39 * software, derivative works or modified versions, and any portions
40 * thereof, and that both notices appear in supporting documentation.
41 *
42 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
43 * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
44 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
45 *
46 * Carnegie Mellon requests users of this software to return to
47 *
48 *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
49 *  School of Computer Science
50 *  Carnegie Mellon University
51 *  Pittsburgh PA 15213-3890
52 *
53 * any improvements or extensions that they make and grant Carnegie Mellon
54 * the rights to redistribute these changes.
55 */
56/*
57 */
58
59#include <platforms.h>
60
61#include <i386/asm.h>
62#include <i386/proc_reg.h>
63#include <i386/postcode.h>
64#include <assym.s>
65
66#define	CX(addr,reg)	addr(,reg,4)
67
68#include <i386/acpi.h>
69#include <i386/cpuid.h>
70
71/*
72 * Interrupt and bootup stack for initial processor.
73 */
74
75/* in the __HIB section since the hibernate restore code uses this stack. */
76	.section __HIB, __data
77	.align	12
78
79	.globl	EXT(low_intstack)
80EXT(low_intstack):
81	.globl  EXT(gIOHibernateRestoreStack)
82EXT(gIOHibernateRestoreStack):
83
84	.space	INTSTACK_SIZE
85
86	.globl	EXT(low_eintstack)
87EXT(low_eintstack:)
88	.globl  EXT(gIOHibernateRestoreStackEnd)
89EXT(gIOHibernateRestoreStackEnd):
90
91/*
92 * Pointers to GDT and IDT.  These contain linear addresses.
93 */
94	.align	ALIGN
95	.globl	EXT(gdtptr)
96	/* align below properly */
97	.word	0
98LEXT(gdtptr)
99	.word	Times(8,GDTSZ)-1
100	.long	EXT(master_gdt)
101
102	/* back to the regular __DATA section. */
103
104	.section __DATA, __data
105
106/*
107 * Stack for last-gasp double-fault handler.
108 */
109	.align	12
110	.globl	EXT(df_task_stack)
111EXT(df_task_stack):
112	.space	INTSTACK_SIZE
113	.globl	EXT(df_task_stack_end)
114EXT(df_task_stack_end):
115
116
117/*
118 * Stack for machine-check handler.
119 */
120	.align	12
121	.globl	EXT(mc_task_stack)
122EXT(mc_task_stack):
123	.space	INTSTACK_SIZE
124	.globl	EXT(mc_task_stack_end)
125EXT(mc_task_stack_end):
126
127/*
128 * BSP CPU start here.
129 *	eax points to kernbootstruct
130 *
131 * Environment:
132 *	protected mode, no paging, flat 32-bit address space.
133 *	(Code/data/stack segments have base == 0, limit == 4G)
134 */
135	.text
136	.align	ALIGN
137	.globl	EXT(_start)
138LEXT(_start)
139	mov		%ds, %bx
140	mov		%bx, %es
141	mov		%eax, %ebp		/* Move kernbootstruct to ebp */
142	mov		%eax, %ebx		/* get pointer to kernbootstruct */
143
144	mov	$EXT(low_eintstack),%esp	/* switch to the bootup stack */
145
146	POSTCODE(PSTART_ENTRY)
147
148	lgdt	EXT(gdtptr)			/* load GDT */
149
150	mov	$(KERNEL_DS),%ax		/* set kernel data segment */
151	mov	%ax, %ds
152	mov	%ax, %es
153	mov	%ax, %ss
154	xor	%ax, %ax			/* fs must be zeroed; */
155	mov	%ax, %fs			/* some bootstrappers don`t do this */
156	mov	%ax, %gs
157	cld
158
159	/* "The Aussie Maneuver" ("Myria" variant) */
160	pushl $(0xcb<<24)|KERNEL32_CS		/* reload CS  */
161	call .-1
162
163paging:
164	andl	$0xfffffff0, %esp		/* align stack */
165	subl	$0xc, %esp
166	pushl	%ebp				/* push boot args addr */
167	xorl	%ebp, %ebp			/* zero frame pointer */
168
169	POSTCODE(PSTART_BEFORE_PAGING)
170
171/*
172 * Turn on paging.
173 */
174	movl	$EXT(IdlePDPT), %eax		/* CR3 */
175	movl	%eax, %cr3
176	movl	%cr4, %eax			/* PAE */
177	orl	$(CR4_PAE), %eax
178	movl	%eax, %cr4
179	movl	%cr0,%eax			/* paging */
180	orl	$(CR0_PG|CR0_WP),%eax
181	movl	%eax,%cr0
182
183	POSTCODE(PSTART_VSTART)
184
185	call	EXT(vstart)			/* run C code */
186	/*NOTREACHED*/
187	hlt
188
189/*
190 * AP (slave) CPUs enter here.
191 *
192 * Environment:
193 *	protected mode, no paging, flat 32-bit address space.
194 *	(Code/data/stack segments have base == 0, limit == 4G)
195 */
196	.align	ALIGN
197	.globl	EXT(slave_pstart)
198LEXT(slave_pstart)
199	cli				/* disable interrupts, so we don`t */
200					/* need IDT for a while */
201	xor %ebp, %ebp	// zero boot cpu
202	mov $EXT(mp_slave_stack)+PAGE_SIZE, %esp;
203	jmp paging
204
205
206/* Code to get from real mode to protected mode */
207
208#define	operand_size_prefix	.byte 0x66
209#define	address_size_prefix	.byte 0x67
210#define	cs_base_prefix		.byte 0x2e
211
212#undef LJMP
213#define	LJMP(segment,address)			\
214	operand_size_prefix			;\
215	.byte	0xea				;\
216	.long	address-EXT(real_mode_bootstrap_base)	;\
217	.word	segment
218
219#define	LGDT(address)				\
220	cs_base_prefix				;\
221	address_size_prefix			;\
222	operand_size_prefix			;\
223	.word	0x010f				;\
224	.byte	0x15				;\
225	.long	address-EXT(real_mode_bootstrap_base)
226
227.section __HIB,__text
228.align	12	/* Page align for single bcopy_phys() */
229.code32
230Entry(real_mode_bootstrap_base)
231	cli
232
233	LGDT(EXT(protected_mode_gdtr))
234
235	/* set the PE bit of CR0 */
236	mov	%cr0, %eax
237	inc %eax
238	mov	%eax, %cr0
239
240	/* reload CS register */
241	LJMP(KERNEL32_CS, 1f + REAL_MODE_BOOTSTRAP_OFFSET)
2421:
243
244	/* we are in protected mode now */
245	/* set up the segment registers */
246	mov	$KERNEL_DS, %eax
247	movw	%ax, %ds
248	movw	%ax, %es
249	movw	%ax, %ss
250	mov		$0, %ax
251	movw	%ax, %fs
252	movw	%ax, %gs
253
254	POSTCODE(SLAVE_STARTPROG_ENTRY);
255
256	mov	PROT_MODE_START+REAL_MODE_BOOTSTRAP_OFFSET, %ecx
257	jmp 	*%ecx
258
259Entry(protected_mode_gdtr)
260	.short	160		/* limit (8*6 segs) */
261	.long	EXT(master_gdt)
262
263Entry(real_mode_bootstrap_end)
264
265.section __HIB,__text
266	.align	ALIGN
267	.globl	EXT(hibernate_machine_entrypoint)
268LEXT(hibernate_machine_entrypoint)
269	mov 	%eax, %edi // save header pointer
270	/* restore gdt */
271	lgdt	EXT(protected_mode_gdtr)
272
273	/* setup the protected mode segment registers */
274	mov		$KERNEL_DS, %eax
275	movw	%ax, %ds
276	movw	%ax, %es
277	movw	%ax, %ss
278	mov		$0,%ax			/* fs must be zeroed; */
279	mov		%ax,%fs
280	mov		%ax,%gs
281
282	/* set up the page tables to use BootstrapPTD
283	 * as done in idle_pt.c, but this must be done programatically */
284	mov $EXT(IdlePDPT), %eax
285	mov $EXT(BootPTD) + (INTEL_PTE_VALID), %ecx
286	mov $0x0, %edx
287	mov	%ecx, (0*8+0)(%eax)
288	mov %edx, (0*8+4)(%eax)
289	add	$(PAGE_SIZE), %ecx
290	mov %ecx, (1*8+0)(%eax)
291	mov %edx, (1*8+4)(%eax)
292	add	$(PAGE_SIZE), %ecx
293	mov %ecx, (2*8+0)(%eax)
294	mov %edx, (2*8+4)(%eax)
295	add	$(PAGE_SIZE), %ecx
296	mov %ecx, (3*8+0)(%eax)
297	mov %edx, (3*8+4)(%eax)
298	mov %eax, %cr3
299
300
301	movl	%cr4,%eax
302	orl		$(CR4_PAE),%eax
303	movl	%eax,%cr4               /* enable page size extensions */
304
305	movl	$(MSR_IA32_EFER), %ecx			/* MSR number in ecx */
306	rdmsr						/* MSR value return in edx: eax */
307	orl	$(MSR_IA32_EFER_NXE), %eax		/* Set NXE bit in low 32-bits */
308	wrmsr						/* Update Extended Feature Enable reg */
309
310	movl	%cr0, %eax
311	orl	$(CR0_PG|CR0_WP), %eax
312	movl	%eax, %cr0	/* ready paging */
313
314	mov $EXT(gIOHibernateRestoreStackEnd), %esp	/* setup stack */
315	xorl	%ebp, %ebp				/* zero frame pointer */
316
317	ljmpl	$(KERNEL32_CS), $Ltemp
318Ltemp:
319	xorl	%eax, %eax              /* Video memory - N/A */
320	pushl	%eax
321	pushl	%eax
322	pushl	%eax
323	mov		%edi, %eax              /* Pointer to hibernate header */
324	pushl	%eax
325	call	EXT(hibernate_kernel_entrypoint)
326	/* NOTREACHED */
327	hlt
328