/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/ |
H A D | sram.S | 35 strh r0, [r2] @ set dpll into bypass mode 40 strh r0, [r2] @ write new dpll value 48 lock: ldrh r4, [r2], #0 @ read back dpll value 51 tst r4, #1 << 0 @ dpll rate locked?
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/ |
H A D | sram.S | 35 strh r0, [r2] @ set dpll into bypass mode 40 strh r0, [r2] @ write new dpll value 48 lock: ldrh r4, [r2], #0 @ read back dpll value 51 tst r4, #1 << 0 @ dpll rate locked?
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ata/ |
H A D | pata_hpt3x2n.c | 298 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local 305 if ((flags & USE_DPLL) != dpll && alt->qc_active) 314 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local 316 if ((flags & USE_DPLL) != dpll) { 318 flags |= dpll; 321 hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
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H A D | pata_hpt37x.c | 932 int dpll, adjust; local 935 dpll = (ppi[0]->udma_mask & 0xC0) ? 3 : 2; 937 f_low = (MHz[clock_slot] * 48) / MHz[dpll]; 960 if (dpll == 3) 966 MHz[clock_slot], MHz[dpll]);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/ata/ |
H A D | pata_hpt3x2n.c | 298 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local 305 if ((flags & USE_DPLL) != dpll && alt->qc_active) 314 int dpll = hpt3x2n_use_dpll(ap, qc->tf.flags & ATA_TFLAG_WRITE); local 316 if ((flags & USE_DPLL) != dpll) { 318 flags |= dpll; 321 hpt3x2n_set_clock(ap, dpll ? 0x21 : 0x23);
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H A D | pata_hpt37x.c | 932 int dpll, adjust; local 935 dpll = (ppi[0]->udma_mask & 0xC0) ? 3 : 2; 937 f_low = (MHz[clock_slot] * 48) / MHz[dpll]; 960 if (dpll == 3) 966 MHz[clock_slot], MHz[dpll]);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/gpu/drm/i915/ |
H A D | intel_display.c | 3504 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; local 3767 dpll = DPLL_VGA_MODE_DIS; 3771 dpll |= DPLLB_MODE_LVDS; 3773 dpll |= DPLLB_MODE_DAC_SERIAL; 3775 dpll |= DPLL_DVO_HIGH_SPEED; 3778 dpll |= (sdvo_pixel_multiply - 1) << SDVO_MULTIPLIER_SHIFT_HIRES; 3780 dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT; 3783 dpll |= DPLL_DVO_HIGH_SPEED; 3787 dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW; 3789 dpll | 4519 u32 dpll = I915_READ((pipe == 0) ? DPLL_A : DPLL_B); local 4664 int dpll = I915_READ(dpll_reg); local 4704 int dpll = I915_READ(dpll_reg); local [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/gpu/drm/i915/ |
H A D | intel_display.c | 3504 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; local 3767 dpll = DPLL_VGA_MODE_DIS; 3771 dpll |= DPLLB_MODE_LVDS; 3773 dpll |= DPLLB_MODE_DAC_SERIAL; 3775 dpll |= DPLL_DVO_HIGH_SPEED; 3778 dpll |= (sdvo_pixel_multiply - 1) << SDVO_MULTIPLIER_SHIFT_HIRES; 3780 dpll |= (sdvo_pixel_multiply - 1) << PLL_REF_SDVO_HDMI_MULTIPLIER_SHIFT; 3783 dpll |= DPLL_DVO_HIGH_SPEED; 3787 dpll |= (1 << (clock.p1 - 1)) << DPLL_FPA01_P1_POST_DIV_SHIFT_PINEVIEW; 3789 dpll | 4519 u32 dpll = I915_READ((pipe == 0) ? DPLL_A : DPLL_B); local 4664 int dpll = I915_READ(dpll_reg); local 4704 int dpll = I915_READ(dpll_reg); local [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/intelfb/ |
H A D | intelfbhw.c | 675 static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, argument 681 if (dpll & DPLL_P1_FORCE_DIV2) 684 p1 = (dpll >> DPLL_P1_SHIFT) & 0xff; 688 p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK; 690 if (dpll & DPLL_P1_FORCE_DIV2) 693 p1 = (dpll >> DPLL_P1_SHIFT) & DPLL_P1_MASK; 694 p2 = (dpll >> DPLL_P2_SHIFT) & DPLL_P2_MASK; 1033 u32 *dpll, *fp0, *fp1; local 1048 dpll = &hw->dpll_b; 1060 dpll 1270 const u32 *dpll, *fp0, *fp1, *pipe_conf; local [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/video/intelfb/ |
H A D | intelfbhw.c | 675 static void intelfbhw_get_p1p2(struct intelfb_info *dinfo, int dpll, argument 681 if (dpll & DPLL_P1_FORCE_DIV2) 684 p1 = (dpll >> DPLL_P1_SHIFT) & 0xff; 688 p2 = (dpll >> DPLL_I9XX_P2_SHIFT) & DPLL_P2_MASK; 690 if (dpll & DPLL_P1_FORCE_DIV2) 693 p1 = (dpll >> DPLL_P1_SHIFT) & DPLL_P1_MASK; 694 p2 = (dpll >> DPLL_P2_SHIFT) & DPLL_P2_MASK; 1033 u32 *dpll, *fp0, *fp1; local 1048 dpll = &hw->dpll_b; 1060 dpll 1270 const u32 *dpll, *fp0, *fp1, *pipe_conf; local [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap2/ |
H A D | sram242x.S | 256 /* set new dpll dividers _after_ in bypass */ 258 str r0, [r4] @ set dpll ctrl val 271 beq pend @ jump over dpll relock 276 orr r8, r7, #0x3 @ val for lock dpll
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H A D | sram243x.S | 256 /* set new dpll dividers _after_ in bypass */ 258 str r0, [r4] @ set dpll ctrl val 271 beq pend @ jump over dpll relock 276 orr r8, r7, #0x3 @ val for lock dpll
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H A D | sram34xx.S | 190 ldr r10, core_m2_mask_val @ modify m2 for core dpll
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap2/ |
H A D | sram242x.S | 256 /* set new dpll dividers _after_ in bypass */ 258 str r0, [r4] @ set dpll ctrl val 271 beq pend @ jump over dpll relock 276 orr r8, r7, #0x3 @ val for lock dpll
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H A D | sram243x.S | 256 /* set new dpll dividers _after_ in bypass */ 258 str r0, [r4] @ set dpll ctrl val 271 beq pend @ jump over dpll relock 276 orr r8, r7, #0x3 @ val for lock dpll
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H A D | sram34xx.S | 190 ldr r10, core_m2_mask_val @ modify m2 for core dpll
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/ide/ |
H A D | hpt366.c | 734 u32 dpll = (f_high << 16) | f_low | 0x100; local 738 pci_write_config_dword(dev, 0x5c, dpll); 755 pci_read_config_dword (dev, 0x5c, &dpll); 756 pci_write_config_dword(dev, 0x5c, (dpll & ~0x100));
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ide/ |
H A D | hpt366.c | 734 u32 dpll = (f_high << 16) | f_low | 0x100; local 738 pci_write_config_dword(dev, 0x5c, dpll); 755 pci_read_config_dword (dev, 0x5c, &dpll); 756 pci_write_config_dword(dev, 0x5c, (dpll & ~0x100));
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