Searched refs:ctlr (Results 1 - 25 of 58) sorted by relevance

123

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/
H A Ddma.c107 static inline unsigned int edma_read(unsigned ctlr, int offset) argument
109 return (unsigned int)__raw_readl(edmacc_regs_base[ctlr] + offset);
112 static inline void edma_write(unsigned ctlr, int offset, int val) argument
114 __raw_writel(val, edmacc_regs_base[ctlr] + offset);
116 static inline void edma_modify(unsigned ctlr, int offset, unsigned and, argument
119 unsigned val = edma_read(ctlr, offset);
122 edma_write(ctlr, offset, val);
124 static inline void edma_and(unsigned ctlr, int offset, unsigned and) argument
126 unsigned val = edma_read(ctlr, offset);
128 edma_write(ctlr, offse
130 edma_or(unsigned ctlr, int offset, unsigned or) argument
136 edma_read_array(unsigned ctlr, int offset, int i) argument
140 edma_write_array(unsigned ctlr, int offset, int i, unsigned val) argument
145 edma_modify_array(unsigned ctlr, int offset, int i, unsigned and, unsigned or) argument
150 edma_or_array(unsigned ctlr, int offset, int i, unsigned or) argument
154 edma_or_array2(unsigned ctlr, int offset, int i, int j, unsigned or) argument
159 edma_write_array2(unsigned ctlr, int offset, int i, int j, unsigned val) argument
164 edma_shadow0_read(unsigned ctlr, int offset) argument
168 edma_shadow0_read_array(unsigned ctlr, int offset, int i) argument
173 edma_shadow0_write(unsigned ctlr, int offset, unsigned val) argument
177 edma_shadow0_write_array(unsigned ctlr, int offset, int i, unsigned val) argument
182 edma_parm_read(unsigned ctlr, int offset, int param_no) argument
187 edma_parm_write(unsigned ctlr, int offset, int param_no, unsigned val) argument
192 edma_parm_modify(unsigned ctlr, int offset, int param_no, unsigned and, unsigned or) argument
197 edma_parm_and(unsigned ctlr, int offset, int param_no, unsigned and) argument
202 edma_parm_or(unsigned ctlr, int offset, int param_no, unsigned or) argument
267 map_dmach_queue(unsigned ctlr, unsigned ch_no, enum dma_event_q queue_no) argument
281 map_queue_tc(unsigned ctlr, int queue_no, int tc_no) argument
287 assign_priority_to_queue(unsigned ctlr, int queue_no, int priority) argument
306 map_dmach_param(unsigned ctlr) argument
318 unsigned ctlr; local
357 unsigned ctlr; local
411 unsigned ctlr; local
511 reserve_contiguous_slots(int ctlr, unsigned int id, unsigned int num_slots, unsigned int start_slot) argument
570 int i, ctlr; local
625 unsigned i, done = 0, ctlr = 0; local
707 unsigned ctlr; local
738 edma_alloc_slot(unsigned ctlr, int slot) argument
777 unsigned ctlr; local
818 edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count) argument
868 unsigned ctlr, slot_to_free; local
910 unsigned ctlr; local
948 unsigned ctlr; local
983 unsigned ctlr; local
1008 unsigned ctlr; local
1034 unsigned ctlr; local
1081 unsigned ctlr; local
1134 unsigned ctlr; local
1161 unsigned ctlr; local
1183 unsigned ctlr; local
1208 unsigned ctlr; local
1229 unsigned ctlr; local
1255 unsigned ctlr; local
1301 unsigned ctlr; local
1328 unsigned ctlr; local
1356 unsigned ctlr; local
[all...]
H A Dgpio-tnetv107x.c54 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
55 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
59 spin_lock_irqsave(&ctlr->lock, flags);
63 spin_unlock_irqrestore(&ctlr->lock, flags);
70 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
71 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
75 spin_lock_irqsave(&ctlr->lock, flags);
79 spin_unlock_irqrestore(&ctlr->lock, flags);
84 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
85 struct tnetv107x_gpio_regs __iomem *regs = ctlr
101 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
122 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
135 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
156 struct davinci_gpio_controller *ctlr; local
[all...]
H A Dpsc.c29 int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) argument
35 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
37 (int)soc_info->psc_bases, ctlr);
41 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
50 void davinci_psc_config(unsigned int domain, unsigned int ctlr, argument
57 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
59 (int)soc_info->psc_bases, ctlr);
63 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-davinci/
H A Ddma.c107 static inline unsigned int edma_read(unsigned ctlr, int offset) argument
109 return (unsigned int)__raw_readl(edmacc_regs_base[ctlr] + offset);
112 static inline void edma_write(unsigned ctlr, int offset, int val) argument
114 __raw_writel(val, edmacc_regs_base[ctlr] + offset);
116 static inline void edma_modify(unsigned ctlr, int offset, unsigned and, argument
119 unsigned val = edma_read(ctlr, offset);
122 edma_write(ctlr, offset, val);
124 static inline void edma_and(unsigned ctlr, int offset, unsigned and) argument
126 unsigned val = edma_read(ctlr, offset);
128 edma_write(ctlr, offse
130 edma_or(unsigned ctlr, int offset, unsigned or) argument
136 edma_read_array(unsigned ctlr, int offset, int i) argument
140 edma_write_array(unsigned ctlr, int offset, int i, unsigned val) argument
145 edma_modify_array(unsigned ctlr, int offset, int i, unsigned and, unsigned or) argument
150 edma_or_array(unsigned ctlr, int offset, int i, unsigned or) argument
154 edma_or_array2(unsigned ctlr, int offset, int i, int j, unsigned or) argument
159 edma_write_array2(unsigned ctlr, int offset, int i, int j, unsigned val) argument
164 edma_shadow0_read(unsigned ctlr, int offset) argument
168 edma_shadow0_read_array(unsigned ctlr, int offset, int i) argument
173 edma_shadow0_write(unsigned ctlr, int offset, unsigned val) argument
177 edma_shadow0_write_array(unsigned ctlr, int offset, int i, unsigned val) argument
182 edma_parm_read(unsigned ctlr, int offset, int param_no) argument
187 edma_parm_write(unsigned ctlr, int offset, int param_no, unsigned val) argument
192 edma_parm_modify(unsigned ctlr, int offset, int param_no, unsigned and, unsigned or) argument
197 edma_parm_and(unsigned ctlr, int offset, int param_no, unsigned and) argument
202 edma_parm_or(unsigned ctlr, int offset, int param_no, unsigned or) argument
267 map_dmach_queue(unsigned ctlr, unsigned ch_no, enum dma_event_q queue_no) argument
281 map_queue_tc(unsigned ctlr, int queue_no, int tc_no) argument
287 assign_priority_to_queue(unsigned ctlr, int queue_no, int priority) argument
306 map_dmach_param(unsigned ctlr) argument
318 unsigned ctlr; local
357 unsigned ctlr; local
411 unsigned ctlr; local
511 reserve_contiguous_slots(int ctlr, unsigned int id, unsigned int num_slots, unsigned int start_slot) argument
570 int i, ctlr; local
625 unsigned i, done = 0, ctlr = 0; local
707 unsigned ctlr; local
738 edma_alloc_slot(unsigned ctlr, int slot) argument
777 unsigned ctlr; local
818 edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count) argument
868 unsigned ctlr, slot_to_free; local
910 unsigned ctlr; local
948 unsigned ctlr; local
983 unsigned ctlr; local
1008 unsigned ctlr; local
1034 unsigned ctlr; local
1081 unsigned ctlr; local
1134 unsigned ctlr; local
1161 unsigned ctlr; local
1183 unsigned ctlr; local
1208 unsigned ctlr; local
1229 unsigned ctlr; local
1255 unsigned ctlr; local
1301 unsigned ctlr; local
1328 unsigned ctlr; local
1356 unsigned ctlr; local
[all...]
H A Dgpio-tnetv107x.c54 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
55 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
59 spin_lock_irqsave(&ctlr->lock, flags);
63 spin_unlock_irqrestore(&ctlr->lock, flags);
70 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
71 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
75 spin_lock_irqsave(&ctlr->lock, flags);
79 spin_unlock_irqrestore(&ctlr->lock, flags);
84 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
85 struct tnetv107x_gpio_regs __iomem *regs = ctlr
101 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
122 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
135 struct davinci_gpio_controller *ctlr = chip2controller(chip); local
156 struct davinci_gpio_controller *ctlr; local
[all...]
H A Dpsc.c29 int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) argument
35 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
37 (int)soc_info->psc_bases, ctlr);
41 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
50 void davinci_psc_config(unsigned int domain, unsigned int ctlr, argument
57 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
59 (int)soc_info->psc_bases, ctlr);
63 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/include/mach/
H A Dgpio.h85 struct davinci_gpio_controller *ctlr; local
88 ctlr = __gpio_to_controller(gpio);
90 if (ctlr->set_data != ctlr->clr_data) {
93 __raw_writel(mask, ctlr->set_data);
95 __raw_writel(mask, ctlr->clr_data);
114 struct davinci_gpio_controller *ctlr; local
119 ctlr = __gpio_to_controller(gpio);
120 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
H A Dedma.h223 #define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
242 int edma_alloc_slot(unsigned ctlr, int slot);
246 int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
H A Dpsc.h249 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
250 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-davinci/include/mach/
H A Dgpio.h85 struct davinci_gpio_controller *ctlr; local
88 ctlr = __gpio_to_controller(gpio);
90 if (ctlr->set_data != ctlr->clr_data) {
93 __raw_writel(mask, ctlr->set_data);
95 __raw_writel(mask, ctlr->clr_data);
114 struct davinci_gpio_controller *ctlr; local
119 ctlr = __gpio_to_controller(gpio);
120 return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
H A Dedma.h223 #define EDMA_CTLR_CHAN(ctlr, chan) (((ctlr) << 16) | (chan))
242 int edma_alloc_slot(unsigned ctlr, int slot);
246 int edma_alloc_cont_slots(unsigned ctlr, unsigned int id, int slot, int count);
H A Dpsc.h249 extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id);
250 extern void davinci_psc_config(unsigned int domain, unsigned int ctlr,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/device_handler/
H A Dscsi_dh_rdac.c182 struct rdac_controller *ctlr; member in struct:rdac_dh_data
290 if (h->ctlr->use_ms10) {
294 rdac_pg = &h->ctlr->mode_select.expanded;
305 rdac_pg = &h->ctlr->mode_select.legacy;
316 rq = get_rdac_req(sdev, &h->ctlr->mode_select, data_size, WRITE);
321 if (h->ctlr->use_ms10) {
340 struct rdac_controller *ctlr; local
341 ctlr = container_of(kref, struct rdac_controller, kref);
345 list_del(&ctlr->node);
347 kfree(ctlr);
353 struct rdac_controller *ctlr, *tmp; local
559 struct rdac_controller *ctlr = local
626 struct rdac_controller *ctlr; local
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/device_handler/
H A Dscsi_dh_rdac.c182 struct rdac_controller *ctlr; member in struct:rdac_dh_data
290 if (h->ctlr->use_ms10) {
294 rdac_pg = &h->ctlr->mode_select.expanded;
305 rdac_pg = &h->ctlr->mode_select.legacy;
316 rq = get_rdac_req(sdev, &h->ctlr->mode_select, data_size, WRITE);
321 if (h->ctlr->use_ms10) {
340 struct rdac_controller *ctlr; local
341 ctlr = container_of(kref, struct rdac_controller, kref);
345 list_del(&ctlr->node);
347 kfree(ctlr);
353 struct rdac_controller *ctlr, *tmp; local
559 struct rdac_controller *ctlr = local
626 struct rdac_controller *ctlr; local
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/block/
H A Dcpqarray.c142 static int pollcomplete(int ctlr);
143 static void getgeometry(int ctlr);
144 static void start_fwbk(int ctlr);
154 int ctlr,
178 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
231 int i, ctlr; local
239 ctlr = h->ctlr;
265 ctlr, i, drv->blk_size, drv->nr_blks);
269 spin_lock_irqsave(IDA_LOCK(h->ctlr), flag
749 int ctlr; local
1239 int ctlr = h->ctlr; local
1410 sendcmd( __u8 cmd, int ctlr, void *buff, size_t size, unsigned int blk, unsigned int blkcnt, unsigned int log_unit ) argument
1523 int ctlr = host->ctlr; local
1588 pollcomplete(int ctlr) argument
1612 start_fwbk(int ctlr) argument
1647 getgeometry(int ctlr) argument
[all...]
H A Dcciss_scsi.c129 spinlock_t lock; // to protect ccissscsi[ctlr];
175 c->cmd.ctlr = h->ctlr;
272 for (i = 0; i < ccissscsi[h->ctlr].ndevices; i++)
273 target_taken[ccissscsi[h->ctlr].dev[i].target] = 1;
294 int n = ccissscsi[h->ctlr].ndevices;
317 sd = &ccissscsi[h->ctlr].dev[i];
330 sd = &ccissscsi[h->ctlr].dev[n];
351 ccissscsi[h->ctlr].ndevices++;
367 /* assumes h->ctlr]
[all...]
H A Dcpqarray.h76 int ctlr; member in struct:ctlr_info
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/block/
H A Dcpqarray.c142 static int pollcomplete(int ctlr);
143 static void getgeometry(int ctlr);
144 static void start_fwbk(int ctlr);
154 int ctlr,
178 static int cpqarray_register_ctlr(int ctlr, struct pci_dev *pdev);
231 int i, ctlr; local
239 ctlr = h->ctlr;
265 ctlr, i, drv->blk_size, drv->nr_blks);
269 spin_lock_irqsave(IDA_LOCK(h->ctlr), flag
749 int ctlr; local
1239 int ctlr = h->ctlr; local
1410 sendcmd( __u8 cmd, int ctlr, void *buff, size_t size, unsigned int blk, unsigned int blkcnt, unsigned int log_unit ) argument
1523 int ctlr = host->ctlr; local
1588 pollcomplete(int ctlr) argument
1612 start_fwbk(int ctlr) argument
1647 getgeometry(int ctlr) argument
[all...]
H A Dcciss_scsi.c129 spinlock_t lock; // to protect ccissscsi[ctlr];
175 c->cmd.ctlr = h->ctlr;
272 for (i = 0; i < ccissscsi[h->ctlr].ndevices; i++)
273 target_taken[ccissscsi[h->ctlr].dev[i].target] = 1;
294 int n = ccissscsi[h->ctlr].ndevices;
317 sd = &ccissscsi[h->ctlr].dev[i];
330 sd = &ccissscsi[h->ctlr].dev[n];
351 ccissscsi[h->ctlr].ndevices++;
367 /* assumes h->ctlr]
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/fcoe/
H A Dfcoe.h94 * @ctlr: The FCoE controller (for FIP)
106 struct fcoe_ctlr ctlr; member in struct:fcoe_interface
135 #define fcoe_from_ctlr(fip) container_of(fip, struct fcoe_interface, ctlr)
H A Dfcoe.c271 struct fcoe_ctlr *fip = &fcoe->ctlr;
371 fcoe_ctlr_init(&fcoe->ctlr, fip_mode);
372 fcoe->ctlr.send = fcoe_fip_send;
373 fcoe->ctlr.update_mac = fcoe_update_src_mac;
374 fcoe->ctlr.get_src_addr = fcoe_get_src_mac;
378 fcoe_ctlr_destroy(&fcoe->ctlr);
396 struct fcoe_ctlr *fip = &fcoe->ctlr;
442 fcoe_ctlr_destroy(&fcoe->ctlr);
482 fcoe_ctlr_recv(&fcoe->ctlr, skb);
680 wwnn = fcoe_wwn_from_mac(fcoe->ctlr
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/fcoe/
H A Dfcoe.h94 * @ctlr: The FCoE controller (for FIP)
106 struct fcoe_ctlr ctlr; member in struct:fcoe_interface
135 #define fcoe_from_ctlr(fip) container_of(fip, struct fcoe_interface, ctlr)
H A Dfcoe.c271 struct fcoe_ctlr *fip = &fcoe->ctlr;
371 fcoe_ctlr_init(&fcoe->ctlr, fip_mode);
372 fcoe->ctlr.send = fcoe_fip_send;
373 fcoe->ctlr.update_mac = fcoe_update_src_mac;
374 fcoe->ctlr.get_src_addr = fcoe_get_src_mac;
378 fcoe_ctlr_destroy(&fcoe->ctlr);
396 struct fcoe_ctlr *fip = &fcoe->ctlr;
442 fcoe_ctlr_destroy(&fcoe->ctlr);
482 fcoe_ctlr_recv(&fcoe->ctlr, skb);
680 wwnn = fcoe_wwn_from_mac(fcoe->ctlr
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/scsi/fnic/
H A Dfnic_fcs.c71 fcoe_ctlr_link_down(&fnic->ctlr);
74 fcoe_ctlr_link_up(&fnic->ctlr);
83 fcoe_ctlr_link_up(&fnic->ctlr);
89 fcoe_ctlr_link_down(&fnic->ctlr);
154 fcoe_ctlr_recv(&fnic->ctlr, skb);
190 u8 *ctl = fnic->ctlr.ctl_src_addr;
247 fnic_update_mac(lport, fnic->ctlr.ctl_src_addr);
256 fcoe_ctlr_recv_flogi(&fnic->ctlr, lport, fp);
522 fcoe_ctlr_els_send(&fnic->ctlr, fnic->lport, skb))
540 if (fnic->ctlr
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/scsi/fnic/
H A Dfnic_fcs.c71 fcoe_ctlr_link_down(&fnic->ctlr);
74 fcoe_ctlr_link_up(&fnic->ctlr);
83 fcoe_ctlr_link_up(&fnic->ctlr);
89 fcoe_ctlr_link_down(&fnic->ctlr);
154 fcoe_ctlr_recv(&fnic->ctlr, skb);
190 u8 *ctl = fnic->ctlr.ctl_src_addr;
247 fnic_update_mac(lport, fnic->ctlr.ctl_src_addr);
256 fcoe_ctlr_recv_flogi(&fnic->ctlr, lport, fp);
522 fcoe_ctlr_els_send(&fnic->ctlr, fnic->lport, skb))
540 if (fnic->ctlr
[all...]

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