Lines Matching refs:ctlr
54 struct davinci_gpio_controller *ctlr = chip2controller(chip);
55 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
59 spin_lock_irqsave(&ctlr->lock, flags);
63 spin_unlock_irqrestore(&ctlr->lock, flags);
70 struct davinci_gpio_controller *ctlr = chip2controller(chip);
71 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
75 spin_lock_irqsave(&ctlr->lock, flags);
79 spin_unlock_irqrestore(&ctlr->lock, flags);
84 struct davinci_gpio_controller *ctlr = chip2controller(chip);
85 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
89 spin_lock_irqsave(&ctlr->lock, flags);
93 spin_unlock_irqrestore(&ctlr->lock, flags);
101 struct davinci_gpio_controller *ctlr = chip2controller(chip);
102 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
106 spin_lock_irqsave(&ctlr->lock, flags);
115 spin_unlock_irqrestore(&ctlr->lock, flags);
122 struct davinci_gpio_controller *ctlr = chip2controller(chip);
123 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
135 struct davinci_gpio_controller *ctlr = chip2controller(chip);
136 struct tnetv107x_gpio_regs __iomem *regs = ctlr->regs;
140 spin_lock_irqsave(&ctlr->lock, flags);
147 spin_unlock_irqrestore(&ctlr->lock, flags);
156 struct davinci_gpio_controller *ctlr;
175 ctlr = &chips[i];
177 ctlr->chip.label = "tnetv107x";
178 ctlr->chip.can_sleep = 0;
179 ctlr->chip.base = base;
180 ctlr->chip.ngpio = ngpio - base;
181 if (ctlr->chip.ngpio > 32)
182 ctlr->chip.ngpio = 32;
184 ctlr->chip.request = tnetv107x_gpio_request;
185 ctlr->chip.free = tnetv107x_gpio_free;
186 ctlr->chip.direction_input = tnetv107x_gpio_dir_in;
187 ctlr->chip.get = tnetv107x_gpio_get;
188 ctlr->chip.direction_output = tnetv107x_gpio_dir_out;
189 ctlr->chip.set = tnetv107x_gpio_set;
191 spin_lock_init(&ctlr->lock);
193 ctlr->regs = regs;
194 ctlr->set_data = ®s->data_out[i];
195 ctlr->clr_data = ®s->data_out[i];
196 ctlr->in_data = ®s->data_in[i];
198 gpiochip_add(&ctlr->chip);