Searched refs:aty_ld_le32 (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/video/aty/
H A Datyfb_base.c158 temp = aty_ld_le32(LCD_INDEX, par);
168 return aty_ld_le32(lt_lcd_regs[index], par);
173 temp = aty_ld_le32(LCD_INDEX, par);
176 return aty_ld_le32(LCD_DATA, par);
452 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
600 i = aty_ld_le32(GP_IO, par); /* get primary sense value */
606 i = aty_ld_le32(GP_IO, par);
613 i = aty_ld_le32(GP_IO, par);
620 sense |= (aty_ld_le32(GP_IO, par) & 0x3000) >> 12;
638 crtc->lcd_index = aty_ld_le32(LCD_INDE
[all...]
H A Dmach64_accel.c42 aty_ld_le32(GEN_TEST_CNTL, par) &
46 aty_ld_le32(GEN_TEST_CNTL, par) | GUI_ENGINE_ENABLE, par);
50 aty_ld_le32(BUS_CNTL, par) | BUS_HOST_ERR_ACK | BUS_FIFO_ERR_ACK, par);
173 aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, par) & ~0x20,
297 pix_width = pix_width_save = aty_ld_le32(DP_PIX_WIDTH, par);
298 host_cntl = aty_ld_le32(HOST_CNTL, par) | HOST_BYTE_ALIGN;
H A Daty128fb.c515 #define aty_ld_le32(regindex) _aty_ld_le32(regindex, par) macro
532 return aty_ld_le32(CLOCK_CNTL_DATA);
583 val = aty_ld_le32(BIOS_0_SCRATCH);
586 if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) {
589 if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)
607 par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff;
624 if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) {
648 tmp = aty_ld_le32(PC_NGUI_CTLSTAT);
654 if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY))
665 clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDE
[all...]
H A Dmach64_ct.c307 crtc_gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par);
394 pll->ct.dsp_config = aty_ld_le32(DSP_CONFIG, par);
395 pll->ct.dsp_on_off = aty_ld_le32(DSP_ON_OFF, par);
436 memcntl = aty_ld_le32(MEM_CNTL, par);
490 dsp_config = aty_ld_le32(DSP_CONFIG, par);
491 dsp_on_off = aty_ld_le32(DSP_ON_OFF, par);
492 vga_dsp_config = aty_ld_le32(VGA_DSP_CONFIG, par);
493 vga_dsp_on_off = aty_ld_le32(VGA_DSP_ON_OFF, par);
H A Datyfb.h227 static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par) function
351 while ((aty_ld_le32(FIFO_STAT, par) & 0xffff) >
358 while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
H A Dmach64_cursor.c81 aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par)
84 aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/video/aty/
H A Datyfb_base.c158 temp = aty_ld_le32(LCD_INDEX, par);
168 return aty_ld_le32(lt_lcd_regs[index], par);
173 temp = aty_ld_le32(LCD_INDEX, par);
176 return aty_ld_le32(LCD_DATA, par);
452 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
600 i = aty_ld_le32(GP_IO, par); /* get primary sense value */
606 i = aty_ld_le32(GP_IO, par);
613 i = aty_ld_le32(GP_IO, par);
620 sense |= (aty_ld_le32(GP_IO, par) & 0x3000) >> 12;
638 crtc->lcd_index = aty_ld_le32(LCD_INDE
[all...]
H A Dmach64_accel.c42 aty_ld_le32(GEN_TEST_CNTL, par) &
46 aty_ld_le32(GEN_TEST_CNTL, par) | GUI_ENGINE_ENABLE, par);
50 aty_ld_le32(BUS_CNTL, par) | BUS_HOST_ERR_ACK | BUS_FIFO_ERR_ACK, par);
173 aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, par) & ~0x20,
297 pix_width = pix_width_save = aty_ld_le32(DP_PIX_WIDTH, par);
298 host_cntl = aty_ld_le32(HOST_CNTL, par) | HOST_BYTE_ALIGN;
H A Daty128fb.c515 #define aty_ld_le32(regindex) _aty_ld_le32(regindex, par) macro
532 return aty_ld_le32(CLOCK_CNTL_DATA);
583 val = aty_ld_le32(BIOS_0_SCRATCH);
586 if (aty_ld_le32(BIOS_0_SCRATCH) == 0x55555555) {
589 if (aty_ld_le32(BIOS_0_SCRATCH) == 0xAAAAAAAA)
607 par->fifo_slots = aty_ld_le32(GUI_STAT) & 0x0fff;
624 if (!(aty_ld_le32(GUI_STAT) & (1 << 31))) {
648 tmp = aty_ld_le32(PC_NGUI_CTLSTAT);
654 if (!(aty_ld_le32(PC_NGUI_CTLSTAT) & PC_BUSY))
665 clock_cntl_index = aty_ld_le32(CLOCK_CNTL_INDE
[all...]
H A Dmach64_ct.c307 crtc_gen_cntl = aty_ld_le32(CRTC_GEN_CNTL, par);
394 pll->ct.dsp_config = aty_ld_le32(DSP_CONFIG, par);
395 pll->ct.dsp_on_off = aty_ld_le32(DSP_ON_OFF, par);
436 memcntl = aty_ld_le32(MEM_CNTL, par);
490 dsp_config = aty_ld_le32(DSP_CONFIG, par);
491 dsp_on_off = aty_ld_le32(DSP_ON_OFF, par);
492 vga_dsp_config = aty_ld_le32(VGA_DSP_CONFIG, par);
493 vga_dsp_on_off = aty_ld_le32(VGA_DSP_ON_OFF, par);
H A Datyfb.h227 static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par) function
351 while ((aty_ld_le32(FIFO_STAT, par) & 0xffff) >
358 while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
H A Dmach64_cursor.c81 aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par)
84 aty_st_le32(GEN_TEST_CNTL, aty_ld_le32(GEN_TEST_CNTL, par)

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