| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf533/include/mach/ |
| H A D | cdefBF532.h | 513 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
514 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| H A D | defBF532.h | 89 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/ |
| H A D | cdefBF532.h | 513 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
514 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| H A D | defBF532.h | 89 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/ |
| H A D | cdefBF51x_base.h | 148 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
149 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF51x_base.h | 104 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/ |
| H A D | cdefBF52x_base.h | 165 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
166 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF52x_base.h | 99 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/ |
| H A D | cdefBF51x_base.h | 148 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
149 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF51x_base.h | 104 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/ |
| H A D | cdefBF52x_base.h | 165 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
166 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF52x_base.h | 99 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/ |
| H A D | defBF534.h | 82 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| H A D | cdefBF534.h | 131 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
132 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/ |
| H A D | defBF561.h | 124 #define TIMER1_PERIOD 0xFFC00618 /* Timer1 Period register */ macro
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| H A D | cdefBF561.h | 183 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
184 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/ |
| H A D | defBF534.h | 82 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| H A D | cdefBF534.h | 131 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
132 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/ |
| H A D | defBF561.h | 124 #define TIMER1_PERIOD 0xFFC00618 /* Timer1 Period register */ macro
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| H A D | cdefBF561.h | 183 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
184 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD,val)
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/ |
| H A D | cdefBF538.h | 206 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
207 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF539.h | 100 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/ |
| H A D | cdefBF538.h | 206 #define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
207 #define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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| H A D | defBF539.h | 100 #define TIMER1_PERIOD 0xFFC00618 /* Timer 1 Period Register */ macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/ |
| H A D | defBF54x_base.h | 656 #define TIMER1_PERIOD 0xffc01618 /* Timer 1 Period Register */ macro
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