Searched refs:RESET_WDOG (Results 1 - 16 of 16) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/kernel/
H A Dsetup.c920 } else if (_bfin_swrst & RESET_WDOG)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h379 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/kernel/
H A Dsetup.c920 } else if (_bfin_swrst & RESET_WDOG)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DdefBF532.h379 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A DdefBF51x_base.h598 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/
H A DdefBF52x_base.h599 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DdefBF51x_base.h598 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DdefBF52x_base.h599 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h971 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h35 #define RESET_WDOG (SWRST_WDT_B|SWRST_WDT_A) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h971 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/
H A DdefBF561.h35 #define RESET_WDOG (SWRST_WDT_B|SWRST_WDT_A) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A DdefBF539.h1429 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1993 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DdefBF539.h1429 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h1993 #define RESET_WDOG 0x4000 /* SW Reset Generated By Watchdog Timer */ macro

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