Searched refs:PM_WKDEP (Results 1 - 8 of 8) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap2/ |
| H A D | prcm.c | 418 prm_read_mod_reg(OMAP3430ES2_SGX_MOD, PM_WKDEP);
420 prm_read_mod_reg(OMAP3430_DSS_MOD, PM_WKDEP);
422 prm_read_mod_reg(OMAP3430_CAM_MOD, PM_WKDEP);
424 prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKDEP);
426 prm_read_mod_reg(OMAP3430_NEON_MOD, PM_WKDEP);
428 prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
562 PM_WKDEP);
564 PM_WKDEP);
566 PM_WKDEP);
568 PM_WKDEP);
[all...] |
| H A D | pm34xx.c | 752 prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
753 prm_write_mod_reg(0, MPU_MOD, PM_WKDEP);
754 prm_write_mod_reg(0, OMAP3430_DSS_MOD, PM_WKDEP);
755 prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
756 prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
757 prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
759 prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
760 prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
762 prm_write_mod_reg(0, GFX_MOD, PM_WKDEP);
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| H A D | clockdomain.c | 293 PM_WKDEP,
499 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
534 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
568 return prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP,
599 prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP);
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| H A D | prm.h | 192 #define PM_WKDEP 0x00c8 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap2/ |
| H A D | prcm.c | 418 prm_read_mod_reg(OMAP3430ES2_SGX_MOD, PM_WKDEP);
420 prm_read_mod_reg(OMAP3430_DSS_MOD, PM_WKDEP);
422 prm_read_mod_reg(OMAP3430_CAM_MOD, PM_WKDEP);
424 prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKDEP);
426 prm_read_mod_reg(OMAP3430_NEON_MOD, PM_WKDEP);
428 prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
562 PM_WKDEP);
564 PM_WKDEP);
566 PM_WKDEP);
568 PM_WKDEP);
[all...] |
| H A D | pm34xx.c | 752 prm_write_mod_reg(0, OMAP3430_IVA2_MOD, PM_WKDEP);
753 prm_write_mod_reg(0, MPU_MOD, PM_WKDEP);
754 prm_write_mod_reg(0, OMAP3430_DSS_MOD, PM_WKDEP);
755 prm_write_mod_reg(0, OMAP3430_NEON_MOD, PM_WKDEP);
756 prm_write_mod_reg(0, OMAP3430_CAM_MOD, PM_WKDEP);
757 prm_write_mod_reg(0, OMAP3430_PER_MOD, PM_WKDEP);
759 prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
760 prm_write_mod_reg(0, OMAP3430ES2_USBHOST_MOD, PM_WKDEP);
762 prm_write_mod_reg(0, GFX_MOD, PM_WKDEP);
|
| H A D | clockdomain.c | 293 PM_WKDEP,
499 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
534 clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP);
568 return prm_read_mod_bits_shift(clkdm1->pwrdm.ptr->prcm_offs, PM_WKDEP,
599 prm_clear_mod_reg_bits(mask, clkdm->pwrdm.ptr->prcm_offs, PM_WKDEP);
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| H A D | prm.h | 192 #define PM_WKDEP 0x00c8 macro
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