Searched refs:OMAP3430ES2_SGX_MOD (Results 1 - 14 of 14) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap2/ |
H A D | prcm.c | 305 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); 334 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); 352 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN); 374 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, 404 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP); 418 prm_read_mod_reg(OMAP3430ES2_SGX_MOD, PM_WKDEP); 458 cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, 486 cm_write_mod_reg(prcm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD, 500 cm_write_mod_reg(prcm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD, 520 cm_write_mod_reg(prcm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, [all...] |
H A D | powerdomains34xx.h | 145 .prcm_offs = OMAP3430ES2_SGX_MOD,
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H A D | pm-debug.c | 145 { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, 159 { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
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H A D | prcm-common.h | 44 #define OMAP3430ES2_SGX_MOD GFX_MOD macro
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H A D | clockdomains.h | 641 .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430ES2_SGX_MOD,
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H A D | pm34xx.c | 759 prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
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H A D | clock3xxx_data.c | 1288 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN), 1290 .clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL), 1303 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap2/ |
H A D | prcm.c | 305 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL); 334 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_FCLKEN); 352 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_ICLKEN); 374 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, 404 cm_read_mod_reg(OMAP3430ES2_SGX_MOD, OMAP3430_CM_SLEEPDEP); 418 prm_read_mod_reg(OMAP3430ES2_SGX_MOD, PM_WKDEP); 458 cm_write_mod_reg(prcm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD, 486 cm_write_mod_reg(prcm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD, 500 cm_write_mod_reg(prcm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD, 520 cm_write_mod_reg(prcm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD, [all...] |
H A D | powerdomains34xx.h | 145 .prcm_offs = OMAP3430ES2_SGX_MOD,
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H A D | pm-debug.c | 145 { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, 159 { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
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H A D | prcm-common.h | 44 #define OMAP3430ES2_SGX_MOD GFX_MOD macro
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H A D | clockdomains.h | 641 .clkstctrl_reg = OMAP34XX_CM_REGADDR(OMAP3430ES2_SGX_MOD,
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H A D | pm34xx.c | 759 prm_write_mod_reg(0, OMAP3430ES2_SGX_MOD, PM_WKDEP);
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H A D | clock3xxx_data.c | 1288 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN), 1290 .clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL), 1303 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
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