Searched refs:OFFSET_LCR (Results 1 - 25 of 30) sorted by relevance

12

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf533/include/mach/
H A Dblackfin.h28 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A Dblackfin.h33 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A Dblackfin.h28 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A Dblackfin.h33 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A Dblackfin.h54 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/
H A Dblackfin.h42 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/
H A Dblackfin.h36 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A Dblackfin.h57 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h15 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
27 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A Dblackfin.h54 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A Dblackfin.h42 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A Dblackfin.h36 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A Dblackfin.h57 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/
H A Dblackfin.h59 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
H A Dbfin_serial_5xx.h16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR))
25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/
H A Dblackfin.h59 #define OFFSET_LCR 0x0C /* Line Control Register */ macro

Completed in 101 milliseconds

12