/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf533/include/mach/ |
H A D | blackfin.h | 28 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/ |
H A D | blackfin.h | 33 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/ |
H A D | blackfin.h | 28 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/ |
H A D | blackfin.h | 33 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/ |
H A D | blackfin.h | 54 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/ |
H A D | blackfin.h | 42 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/ |
H A D | blackfin.h | 36 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/ |
H A D | blackfin.h | 57 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 15 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 27 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/ |
H A D | blackfin.h | 54 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/ |
H A D | blackfin.h | 42 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart, v) bfin_write16(((uart)->port.membase + OFFSET_LCR), v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/ |
H A D | blackfin.h | 36 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/ |
H A D | blackfin.h | 57 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf561/include/mach/ |
H A D | blackfin.h | 59 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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H A D | bfin_serial_5xx.h | 16 #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) 25 #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf561/include/mach/ |
H A D | blackfin.h | 59 #define OFFSET_LCR 0x0C /* Line Control Register */ macro
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