• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
1/*
2 * Copyright 2008-2009 Analog Devices Inc.
3 *
4 * Licensed under the GPL-2 or later
5 */
6
7#ifndef _MACH_BLACKFIN_H_
8#define _MACH_BLACKFIN_H_
9
10#include "bf518.h"
11#include "defBF512.h"
12#include "anomaly.h"
13
14#if defined(CONFIG_BF518)
15#include "defBF518.h"
16#endif
17
18#if defined(CONFIG_BF516)
19#include "defBF516.h"
20#endif
21
22#if defined(CONFIG_BF514)
23#include "defBF514.h"
24#endif
25
26#if defined(CONFIG_BF512)
27#include "defBF512.h"
28#endif
29
30#if !defined(__ASSEMBLY__)
31#include "cdefBF512.h"
32
33#if defined(CONFIG_BF518)
34#include "cdefBF518.h"
35#endif
36
37#if defined(CONFIG_BF516)
38#include "cdefBF516.h"
39#endif
40
41#if defined(CONFIG_BF514)
42#include "cdefBF514.h"
43#endif
44#endif
45
46#define BFIN_UART_NR_PORTS	2
47
48#define OFFSET_THR              0x00	/* Transmit Holding register            */
49#define OFFSET_RBR              0x00	/* Receive Buffer register              */
50#define OFFSET_DLL              0x00	/* Divisor Latch (Low-Byte)             */
51#define OFFSET_IER              0x04	/* Interrupt Enable Register            */
52#define OFFSET_DLH              0x04	/* Divisor Latch (High-Byte)            */
53#define OFFSET_IIR              0x08	/* Interrupt Identification Register    */
54#define OFFSET_LCR              0x0C	/* Line Control Register                */
55#define OFFSET_MCR              0x10	/* Modem Control Register               */
56#define OFFSET_LSR              0x14	/* Line Status Register                 */
57#define OFFSET_MSR              0x18	/* Modem Status Register                */
58#define OFFSET_SCR              0x1C	/* SCR Scratch Register                 */
59#define OFFSET_GCTL             0x24	/* Global Control Register              */
60
61#endif
62