Searched refs:MAX_PHY_REG_ADDRESS (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000e/
H A Dphy.c65 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
67 ~MAX_PHY_REG_ADDRESS)))
192 if (offset > MAX_PHY_REG_ADDRESS) {
245 if (offset > MAX_PHY_REG_ADDRESS) {
303 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
328 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
369 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
440 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2440 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2499 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS
[all...]
H A Des2lan.c459 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
496 MAX_PHY_REG_ADDRESS & offset,
502 MAX_PHY_REG_ADDRESS & offset,
531 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
567 MAX_PHY_REG_ADDRESS & offset,
573 MAX_PHY_REG_ADDRESS & offset,
H A Ddefines.h700 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
785 ((reg) & MAX_PHY_REG_ADDRESS))
794 (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
H A Dnetdev.c3717 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3720 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3726 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3729 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3735 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3738 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3744 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3748 MAX_PHY_REG_ADDRESS,
3754 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3757 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
[all...]
H A De1000.h99 (((reg) & MAX_PHY_REG_ADDRESS) |\
101 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
H A Dich8lan.c118 ((reg) & MAX_PHY_REG_ADDRESS))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000e/
H A Dphy.c65 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
67 ~MAX_PHY_REG_ADDRESS)))
192 if (offset > MAX_PHY_REG_ADDRESS) {
245 if (offset > MAX_PHY_REG_ADDRESS) {
303 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
328 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
369 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
440 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2440 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2499 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS
[all...]
H A Des2lan.c459 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
496 MAX_PHY_REG_ADDRESS & offset,
502 MAX_PHY_REG_ADDRESS & offset,
531 if ((offset & MAX_PHY_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
567 MAX_PHY_REG_ADDRESS & offset,
573 MAX_PHY_REG_ADDRESS & offset,
H A Ddefines.h700 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
785 ((reg) & MAX_PHY_REG_ADDRESS))
794 (((page) << GG82563_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
H A Dnetdev.c3717 e1000e_read_phy_reg_mdic(hw, HV_SCC_UPPER & MAX_PHY_REG_ADDRESS,
3720 HV_SCC_LOWER & MAX_PHY_REG_ADDRESS,
3726 e1000e_read_phy_reg_mdic(hw, HV_ECOL_UPPER & MAX_PHY_REG_ADDRESS,
3729 HV_ECOL_LOWER & MAX_PHY_REG_ADDRESS,
3735 e1000e_read_phy_reg_mdic(hw, HV_MCC_UPPER & MAX_PHY_REG_ADDRESS,
3738 HV_MCC_LOWER & MAX_PHY_REG_ADDRESS,
3744 e1000e_read_phy_reg_mdic(hw, HV_LATECOL_UPPER & MAX_PHY_REG_ADDRESS,
3748 MAX_PHY_REG_ADDRESS,
3754 e1000e_read_phy_reg_mdic(hw, HV_COLC_UPPER & MAX_PHY_REG_ADDRESS,
3757 HV_COLC_LOWER & MAX_PHY_REG_ADDRESS,
[all...]
H A De1000.h99 (((reg) & MAX_PHY_REG_ADDRESS) |\
101 (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
H A Dich8lan.c118 ((reg) & MAX_PHY_REG_ADDRESS))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/igb/
H A De1000_phy.c145 if (offset > MAX_PHY_REG_ADDRESS) {
203 if (offset > MAX_PHY_REG_ADDRESS) {
375 ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
414 ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
H A De1000_defines.h628 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/igb/
H A De1000_phy.c145 if (offset > MAX_PHY_REG_ADDRESS) {
203 if (offset > MAX_PHY_REG_ADDRESS) {
375 ret_val = igb_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
414 ret_val = igb_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
H A De1000_defines.h628 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/e1000/
H A De1000_hw.c2720 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2735 if (reg_addr > MAX_PHY_REG_ADDRESS) {
2822 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2837 if (reg_addr > MAX_PHY_REG_ADDRESS) {
H A De1000_hw.h2464 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
2880 (((page) << PHY_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/net/e1000/
H A De1000_hw.c2720 ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2735 if (reg_addr > MAX_PHY_REG_ADDRESS) {
2822 ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
2837 if (reg_addr > MAX_PHY_REG_ADDRESS) {
H A De1000_hw.h2464 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ macro
2880 (((page) << PHY_PAGE_SHIFT) | ((reg) & MAX_PHY_REG_ADDRESS))

Completed in 435 milliseconds