Searched refs:GPIO_LEVEL_MASK (Results 1 - 18 of 18) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/include/mach/ |
| H A D | gpio.h | 24 #define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/include/mach/ |
| H A D | gpio.h | 24 #define GPIO_LEVEL_MASK(pin) ORION5X_DEV_BUS_REG(0x11c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-kirkwood/ |
| H A D | irq.c | 38 writel(0, GPIO_LEVEL_MASK(0));
41 writel(0, GPIO_LEVEL_MASK(32));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-kirkwood/ |
| H A D | irq.c | 38 writel(0, GPIO_LEVEL_MASK(0));
41 writel(0, GPIO_LEVEL_MASK(32));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-dove/include/mach/ |
| H A D | gpio.h | 31 #define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-kirkwood/include/mach/ |
| H A D | gpio.h | 25 #define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x1c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mv78xx0/include/mach/ |
| H A D | gpio.h | 27 #define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/ |
| H A D | irq.c | 38 writel(0x0, GPIO_LEVEL_MASK(0));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/include/mach/ |
| H A D | gpio.h | 31 #define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-kirkwood/include/mach/ |
| H A D | gpio.h | 25 #define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x1c) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mv78xx0/include/mach/ |
| H A D | gpio.h | 27 #define GPIO_LEVEL_MASK(pin) (DEV_BUS_VIRT_BASE + 0x011c + GPIO_MASK_OFF) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/ |
| H A D | irq.c | 38 writel(0x0, GPIO_LEVEL_MASK(0));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mv78xx0/ |
| H A D | irq.c | 41 writel(0, GPIO_LEVEL_MASK(0));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mv78xx0/ |
| H A D | irq.c | 41 writel(0, GPIO_LEVEL_MASK(0));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-orion/ |
| H A D | gpio.c | 250 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
261 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
339 cause = readl(GPIO_DATA_IN(pinoff)) & readl(GPIO_LEVEL_MASK(pinoff));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-orion/ |
| H A D | gpio.c | 250 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
261 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin);
339 cause = readl(GPIO_DATA_IN(pinoff)) & readl(GPIO_LEVEL_MASK(pinoff));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-dove/ |
| H A D | irq.c | 104 writel(0, GPIO_LEVEL_MASK(0));
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/ |
| H A D | irq.c | 104 writel(0, GPIO_LEVEL_MASK(0));
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