Searched refs:GPIO_EDGE_MASK (Results 1 - 18 of 18) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/include/mach/ |
H A D | gpio.h | 23 #define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/include/mach/ |
H A D | gpio.h | 23 #define GPIO_EDGE_MASK(pin) ORION5X_DEV_BUS_REG(0x118) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-kirkwood/ |
H A D | irq.c | 39 writel(0, GPIO_EDGE_MASK(0)); 42 writel(0, GPIO_EDGE_MASK(32));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-kirkwood/ |
H A D | irq.c | 39 writel(0, GPIO_EDGE_MASK(0)); 42 writel(0, GPIO_EDGE_MASK(32));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-dove/include/mach/ |
H A D | gpio.h | 30 #define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-kirkwood/include/mach/ |
H A D | gpio.h | 24 #define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x18) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mv78xx0/include/mach/ |
H A D | gpio.h | 26 #define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/ |
H A D | irq.c | 39 writel(0x0, GPIO_EDGE_MASK(0));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/include/mach/ |
H A D | gpio.h | 30 #define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-kirkwood/include/mach/ |
H A D | gpio.h | 24 #define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + GPIO_OFF(pin) + 0x18) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mv78xx0/include/mach/ |
H A D | gpio.h | 26 #define GPIO_EDGE_MASK(pin) (DEV_BUS_VIRT_BASE + 0x0118 + GPIO_MASK_OFF) macro
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-orion5x/ |
H A D | irq.c | 39 writel(0x0, GPIO_EDGE_MASK(0));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mv78xx0/ |
H A D | irq.c | 42 writel(0, GPIO_EDGE_MASK(0));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mv78xx0/ |
H A D | irq.c | 42 writel(0, GPIO_EDGE_MASK(0));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-orion/ |
H A D | gpio.c | 250 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); 261 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); 340 cause |= readl(GPIO_EDGE_CAUSE(pinoff)) & readl(GPIO_EDGE_MASK(pinoff));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-orion/ |
H A D | gpio.c | 250 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); 261 GPIO_EDGE_MASK(pin) : GPIO_LEVEL_MASK(pin); 340 cause |= readl(GPIO_EDGE_CAUSE(pinoff)) & readl(GPIO_EDGE_MASK(pinoff));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-dove/ |
H A D | irq.c | 105 writel(0, GPIO_EDGE_MASK(0));
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-dove/ |
H A D | irq.c | 105 writel(0, GPIO_EDGE_MASK(0));
|
Completed in 83 milliseconds