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H A D | cdefBF532.h | 226 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 227 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
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H A D | defBF532.h | 248 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/ |
H A D | cdefBF532.h | 226 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 227 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
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H A D | defBF532.h | 248 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/ |
H A D | cdefBF51x_base.h | 504 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 505 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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H A D | defBF51x_base.h | 283 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/ |
H A D | cdefBF52x_base.h | 521 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 522 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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H A D | defBF52x_base.h | 283 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/ |
H A D | cdefBF51x_base.h | 504 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 505 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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H A D | defBF51x_base.h | 283 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/ |
H A D | cdefBF52x_base.h | 521 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 522 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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H A D | defBF52x_base.h | 283 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/ |
H A D | defBF534.h | 261 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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H A D | cdefBF534.h | 482 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 483 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/ |
H A D | defBF534.h | 261 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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H A D | cdefBF534.h | 482 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 483 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR,val)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/ |
H A D | cdefBF538.h | 600 #define bfin_read_DMA4_START_ADDR() bfin_readPTR(DMA4_START_ADDR) 601 #define bfin_write_DMA4_START_ADDR(val) bfin_writePTR(DMA4_START_ADDR, val)
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H A D | defBF539.h | 266 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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H A D | cdefBF538.h | 600 #define bfin_read_DMA4_START_ADDR() bfin_readPTR(DMA4_START_ADDR) 601 #define bfin_write_DMA4_START_ADDR(val) bfin_writePTR(DMA4_START_ADDR, val)
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H A D | defBF539.h | 266 #define DMA4_START_ADDR 0xFFC00D04 /* DMA Channel 4 Start Address Register */ macro
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/ |
H A D | defBF54x_base.h | 271 #define DMA4_START_ADDR 0xffc00d04 /* DMA Channel 4 Start Address Register */ macro
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H A D | cdefBF54x_base.h | 429 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 430 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/ |
H A D | defBF54x_base.h | 271 #define DMA4_START_ADDR 0xffc00d04 /* DMA Channel 4 Start Address Register */ macro
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H A D | cdefBF54x_base.h | 429 #define bfin_read_DMA4_START_ADDR() bfin_read32(DMA4_START_ADDR) 430 #define bfin_write_DMA4_START_ADDR(val) bfin_write32(DMA4_START_ADDR, val)
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