Searched refs:DMA3_X_MODIFY (Results 1 - 24 of 24) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h205 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
206 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
H A DdefBF532.h237 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h205 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
206 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
H A DdefBF532.h237 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h483 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
484 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF51x_base.h272 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h500 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
501 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF52x_base.h272 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF51x_base.h483 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
484 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF51x_base.h272 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF52x_base.h500 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
501 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF52x_base.h272 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h250 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF534.h461 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
462 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf537/include/mach/
H A DdefBF534.h250 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF534.h461 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
462 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY,val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h580 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
581 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF539.h255 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h580 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
581 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
H A DdefBF539.h255 #define DMA3_X_MODIFY 0xFFC00CD4 /* DMA Channel 3 X Modify Register */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h258 #define DMA3_X_MODIFY 0xffc00cd4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF54x_base.h406 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
407 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/blackfin/mach-bf548/include/mach/
H A DdefBF54x_base.h258 #define DMA3_X_MODIFY 0xffc00cd4 /* DMA Channel 3 X Modify Register */ macro
H A DcdefBF54x_base.h406 #define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
407 #define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)

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