Searched refs:DMA2_RESET_REG (Results 1 - 24 of 24) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/x86/kernel/
H A Di8237.c32 dma_outb(0, DMA2_RESET_REG);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/x86/kernel/
H A Di8237.c32 dma_outb(0, DMA2_RESET_REG);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/parisc/include/asm/
H A Ddma.h69 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/alpha/kernel/
H A Dsys_sx164.c40 outb(0, DMA2_RESET_REG);
H A Dirq_alpha.c102 outb(0, DMA2_RESET_REG);
H A Dsys_eiger.c143 outb(0, DMA2_RESET_REG);
H A Dsys_dp264.c289 outb(0, DMA2_RESET_REG);
306 outb(0, DMA2_RESET_REG);
H A Dsys_titan.c237 outb(0, DMA2_RESET_REG);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/parisc/include/asm/
H A Ddma.h69 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/alpha/kernel/
H A Dsys_sx164.c40 outb(0, DMA2_RESET_REG);
H A Dirq_alpha.c102 outb(0, DMA2_RESET_REG);
H A Dsys_eiger.c143 outb(0, DMA2_RESET_REG);
H A Dsys_dp264.c289 outb(0, DMA2_RESET_REG);
306 outb(0, DMA2_RESET_REG);
H A Dsys_titan.c237 outb(0, DMA2_RESET_REG);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/x86/include/asm/
H A Ddma.h114 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/x86/include/asm/
H A Ddma.h114 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68k/include/asm/
H A Dapollodma.h94 #define DMA2_RESET_REG (IO_DMA2_BASE+0x1A) /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/
H A Ddma.h119 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/m68k/include/asm/
H A Dapollodma.h94 #define DMA2_RESET_REG (IO_DMA2_BASE+0x1A) /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/
H A Ddma.h119 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/powerpc/include/asm/
H A Ddma.h119 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/alpha/include/asm/
H A Ddma.h152 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/powerpc/include/asm/
H A Ddma.h119 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/alpha/include/asm/
H A Ddma.h152 #define DMA2_RESET_REG 0xDA /* Master Clear (w) */ macro

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