Searched refs:psr (Results 1 - 25 of 95) sorted by relevance

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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sparc/
H A Dhead.h13 #define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
20 rd %psr, %l0; b label; rd %wim, %l3; nop;
23 #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
24 #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
25 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 1, %l7;
26 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 0, %l7;
30 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
47 rd %psr, %l0;
51 rd %psr, %l0; \
58 rd %psr,
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H A Dpsr.h1 /* $Id: psr.h,v 1.1.1.1 2008/10/15 03:29:17 james26_jang Exp $
2 * psr.h: This file holds the macros for masking off various parts of
40 /* Get the %psr register. */
43 unsigned int psr; local
45 "rd %%psr, %0\n\t"
49 : "=r" (psr)
53 return psr;
59 "wr %0, 0x0, %%psr\n\t"
69 * enable bit is set in the %psr when you execute this or you will
H A Dsigcontext.h41 unsigned long psr; member in struct:__anon10851::__anon10852
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sparc/
H A Dhead.h13 #define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */
20 rd %psr, %l0; b label; rd %wim, %l3; nop;
23 #define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7;
24 #define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7;
25 #define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 1, %l7;
26 #define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b C_LABEL(srmmu_fault); mov 0, %l7;
30 rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3;
47 rd %psr, %l0;
51 rd %psr, %l0; \
58 rd %psr,
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H A Dpsr.h1 /* $Id: psr.h,v 1.1.1.1 2008/10/15 03:27:26 james26_jang Exp $
2 * psr.h: This file holds the macros for masking off various parts of
40 /* Get the %psr register. */
43 unsigned int psr; local
45 "rd %%psr, %0\n\t"
49 : "=r" (psr)
53 return psr;
59 "wr %0, 0x0, %%psr\n\t"
69 * enable bit is set in the %psr when you execute this or you will
H A Dsigcontext.h41 unsigned long psr; member in struct:__anon6435::__anon6436
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sparc64/
H A Dpsrcompat.h36 extern inline unsigned long psr_to_tstate_icc(unsigned int psr) argument
38 unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
39 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
40 tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sparc64/
H A Dpsrcompat.h36 extern inline unsigned long psr_to_tstate_icc(unsigned int psr) argument
38 unsigned long tstate = ((unsigned long)(psr & PSR_ICC)) << 12;
39 if ((psr & (PSR_VERS|PSR_IMPL)) == PSR_V8PLUS)
40 tstate |= ((unsigned long)(psr & PSR_XCC)) << 20;
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/sparc/kernel/
H A Dcpu.c14 #include <asm/psr.h>
129 int i, cpuid, psr; local
136 psr = get_psr();
137 put_psr(psr | PSR_EF);
139 put_psr(psr);
150 printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl,
162 printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl,
H A Dtraps.c125 if(regs->psr & PSR_PS)
130 void do_hw_interrupt(unsigned long type, unsigned long psr, unsigned long pc) argument
140 if(psr & PSR_PS)
152 unsigned long psr)
156 if(psr & PSR_PS)
176 unsigned long psr)
180 if(psr & PSR_PS)
192 unsigned long psr)
196 if(regs->psr & PSR_PS) {
222 unsigned long psr)
151 do_illegal_instruction(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
175 do_priv_instruction(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
191 do_memaccess_unaligned(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
221 do_fpd_trap(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
265 do_fpe_trap(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
372 handle_tag_overflow(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
387 handle_watchpoint(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
399 handle_reg_access(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
416 handle_cp_disabled(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
429 handle_cp_exception(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
446 handle_hw_divzero(struct pt_regs *regs, unsigned long pc, unsigned long npc, unsigned long psr) argument
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H A Dmuldiv.c90 unsigned long npc, unsigned long psr);
165 handle_hw_divzero (regs, pc, regs->npc, regs->psr);
194 handle_hw_divzero (regs, pc, regs->npc, regs->psr);
217 regs->psr &= ~PSR_ICC;
220 if (rs2) regs->psr |= PSR_V;
222 if (!rs1) regs->psr |= PSR_Z;
223 if (((int)rs1) < 0) regs->psr |= PSR_N;
225 printk ("psr muldiv: %08x\n", regs->psr);
H A Dtrampoline.S11 #include <asm/psr.h>
26 * in and sets PIL in %psr to 15, no irqs.
46 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
48 wr %g1, 0x0, %psr ! traps off though
71 rd %psr, %g1
72 wr %g1, PSR_ET, %psr ! traps on
116 /* Set up a sane %psr -- PIL<0xf> S<0x1> PS<0x1> CWP<0x0> */
118 wr %g1, 0x0, %psr ! traps off though
148 rd %psr, %g1
149 wr %g1, PSR_ET, %psr ! trap
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H A Dwof.S11 #include <asm/psr.h>
33 #define t_psr l0 /* %psr at trap time T */
59 * rd %psr, %l0
121 wr %t_psr, 0x0, %psr ! restore condition codes in %psr
191 wr %t_psr, 0x0, %psr
207 rd %psr, %glob_tmp
253 wr %t_psr, PSR_ET, %psr
279 /* Restore globals, condition codes in the %psr and
286 wr %t_psr, 0x0, %psr
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H A Dsignal.c162 regs->psr |= PSR_C;
185 regs->psr |= PSR_C;
191 regs->psr |= PSR_C;
218 regs->psr |= PSR_C;
231 regs->psr &= ~PSR_EF;
235 regs->psr &= ~PSR_EF;
280 up_psr = regs->psr;
283 /* User can only change condition codes and FPU enabling in %psr. */
284 regs->psr = (up_psr & ~(PSR_ICC | PSR_EF))
285 | (regs->psr
316 unsigned long pc, npc, psr; local
378 unsigned int psr, pc, npc; local
703 unsigned int psr; local
964 unsigned long pc, npc, psr; local
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H A Dsclow.S13 #include <asm/psr.h>
19 wr %l4, 0x0, %psr; \
27 wr %l4, 0x0, %psr; \
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/sparc/lib/
H A Dbitops.S9 #include <asm/psr.h>
26 rd %psr, %g3
29 wr %g5, 0x0, %psr
47 wr %g3, 0x0, %psr
55 rd %psr, %g3
58 wr %g5, 0x0, %psr
76 wr %g3, 0x0, %psr
84 rd %psr, %g3
87 wr %g5, 0x0, %psr
105 wr %g3, 0x0, %psr
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H A Drwsem.S9 #include <asm/psr.h>
16 rd %psr, %g3
21 wr %g7, 0, %psr
38 wr %g3, 0, %psr
67 rd %psr, %g3
72 wr %g7, 0, %psr
89 wr %g3, 0, %psr
118 rd %psr, %g3
123 wr %g7, 0, %psr
140 wr %g3, 0, %psr
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H A Datomic.S9 #include <asm/psr.h>
20 rd %psr, %g3
24 wr %g3, PSR_PIL, %psr
31 wr %g3, 0x0, %psr
50 rd %psr, %g3 ! Keep the code small, old way was stupid
53 wr %g7, 0x0, %psr ! Set %psr
69 wr %g3, 0x0, %psr ! Restore original PSR_PIL
76 rd %psr, %g3 ! Keep the code small, old way was stupid
79 wr %g7, 0x0, %psr ! Se
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/ia64/kernel/
H A Dpal.S53 * in4 1 ==> clear psr.ic, 0 ==> don't clear psr.ic
70 mov loc3 = psr
75 (p6) rsm psr.i | psr.ic
79 (p7) rsm psr.i
84 1: mov psr.l = loc3
88 srlz.d // seralize restoration of psr.l
113 mov loc3 = psr
115 rsm psr
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/asus-wl-520gu-7.0.1.45/src/tools/upnp/upnp/
H A Dgena.c284 PSubscription *psr = NULL; local
286 for (psr = &(psvc->subscriptions); *psr; psr = &((*psr)->next)) {
287 if (*psr == sr) {
288 *psr = (*psr)->next;
714 PSubscription sr, *psr; local
724 psr
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-ia64/
H A Dsystem.h117 unsigned long ip, psr; \
119 __asm__ __volatile__ ("mov %0=psr;; rsm psr.i;;" : "=r" (psr) :: "memory"); \
120 if (psr & (1UL << 14)) { \
124 (x) = psr; \
129 unsigned long ip, psr; \
131 __asm__ __volatile__ ("mov %0=psr;; rsm psr.i;;" : "=r" (psr)
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H A Dmca_asm.h52 * 1. Save the current psr
56 * in the psr before updating the ipsr and iip.
58 * 4. Turn off the instruction, data and rse translation bits of the psr
62 * [psr.{rt, it, dt, i, be} = 0]
70 * 6. Do an rfi to move the values from ipsr to psr and iip to ip.
73 mov old_psr = psr; \
89 mov temp1 = psr; \
90 mov temp2 = psr; \
95 mov psr.l = temp2; \
133 * 1. Get the old saved psr
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-ia64/
H A Dsystem.h117 unsigned long ip, psr; \
119 __asm__ __volatile__ ("mov %0=psr;; rsm psr.i;;" : "=r" (psr) :: "memory"); \
120 if (psr & (1UL << 14)) { \
124 (x) = psr; \
129 unsigned long ip, psr; \
131 __asm__ __volatile__ ("mov %0=psr;; rsm psr.i;;" : "=r" (psr)
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H A Dmca_asm.h52 * 1. Save the current psr
56 * in the psr before updating the ipsr and iip.
58 * 4. Turn off the instruction, data and rse translation bits of the psr
62 * [psr.{rt, it, dt, i, be} = 0]
70 * 6. Do an rfi to move the values from ipsr to psr and iip to ip.
73 mov old_psr = psr; \
89 mov temp1 = psr; \
90 mov temp2 = psr; \
95 mov psr.l = temp2; \
133 * 1. Get the old saved psr
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/ia64/sn/kernel/
H A Dmisctest.c78 long psr, dcr, res, val, addr=0xff00000000UL; local
90 psr = ia64_clear_ic();
94 ia64_set_psr(psr);

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