1/* cpu.c: Dinky routines to look for the kind of Sparc cpu 2 * we are on. 3 * 4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 5 */ 6 7#include <linux/kernel.h> 8#include <linux/init.h> 9#include <linux/smp.h> 10#include <linux/threads.h> 11#include <asm/oplib.h> 12#include <asm/page.h> 13#include <asm/head.h> 14#include <asm/psr.h> 15#include <asm/mbus.h> 16 17struct cpu_iu_info { 18 int psr_impl; 19 int psr_vers; 20 char* cpu_name; /* should be enough I hope... */ 21}; 22 23struct cpu_fp_info { 24 int psr_impl; 25 int fp_vers; 26 char* fp_name; 27}; 28 29/* In order to get the fpu type correct, you need to take the IDPROM's 30 * machine type value into consideration too. I will fix this. 31 */ 32struct cpu_fp_info linux_sparc_fpu[] = { 33 { 0, 0, "Fujitsu MB86910 or Weitek WTL1164/5"}, 34 { 0, 1, "Fujitsu MB86911 or Weitek WTL1164/5 or LSI L64831"}, 35 { 0, 2, "LSI Logic L64802 or Texas Instruments ACT8847"}, 36 /* SparcStation SLC, SparcStation1 */ 37 { 0, 3, "Weitek WTL3170/2"}, 38 /* SPARCstation-5 */ 39 { 0, 4, "Lsi Logic/Meiko L64804 or compatible"}, 40 { 0, 5, "reserved"}, 41 { 0, 6, "reserved"}, 42 { 0, 7, "No FPU"}, 43 { 1, 0, "ROSS HyperSparc combined IU/FPU"}, 44 { 1, 1, "Lsi Logic L64814"}, 45 { 1, 2, "Texas Instruments TMS390-C602A"}, 46 { 1, 3, "Cypress CY7C602 FPU"}, 47 { 1, 4, "reserved"}, 48 { 1, 5, "reserved"}, 49 { 1, 6, "reserved"}, 50 { 1, 7, "No FPU"}, 51 { 2, 0, "BIT B5010 or B5110/20 or B5210"}, 52 { 2, 1, "reserved"}, 53 { 2, 2, "reserved"}, 54 { 2, 3, "reserved"}, 55 { 2, 4, "reserved"}, 56 { 2, 5, "reserved"}, 57 { 2, 6, "reserved"}, 58 { 2, 7, "No FPU"}, 59 /* SuperSparc 50 module */ 60 { 4, 0, "SuperSparc on-chip FPU"}, 61 /* SparcClassic */ 62 { 4, 4, "TI MicroSparc on chip FPU"}, 63 { 5, 0, "Matsushita MN10501"}, 64 { 5, 1, "reserved"}, 65 { 5, 2, "reserved"}, 66 { 5, 3, "reserved"}, 67 { 5, 4, "reserved"}, 68 { 5, 5, "reserved"}, 69 { 5, 6, "reserved"}, 70 { 5, 7, "No FPU"}, 71 { 9, 3, "Fujitsu or Weitek on-chip FPU"}, 72}; 73 74#define NSPARCFPU (sizeof(linux_sparc_fpu)/sizeof(struct cpu_fp_info)) 75 76struct cpu_iu_info linux_sparc_chips[] = { 77 /* Sun4/100, 4/200, SLC */ 78 { 0, 0, "Fujitsu MB86900/1A or LSI L64831 SparcKIT-40"}, 79 /* borned STP1012PGA */ 80 { 0, 4, "Fujitsu MB86904"}, 81 { 0, 5, "Fujitsu TurboSparc MB86907"}, 82 /* SparcStation2, SparcServer 490 & 690 */ 83 { 1, 0, "LSI Logic Corporation - L64811"}, 84 /* SparcStation2 */ 85 { 1, 1, "Cypress/ROSS CY7C601"}, 86 /* Embedded controller */ 87 { 1, 3, "Cypress/ROSS CY7C611"}, 88 /* Ross Technologies HyperSparc */ 89 { 1, 0xf, "ROSS HyperSparc RT620"}, 90 { 1, 0xe, "ROSS HyperSparc RT625 or RT626"}, 91 /* ECL Implementation, CRAY S-MP Supercomputer... AIEEE! */ 92 /* Someone please write the code to support this beast! ;) */ 93 { 2, 0, "Bipolar Integrated Technology - B5010"}, 94 { 3, 0, "LSI Logic Corporation - unknown-type"}, 95 { 4, 0, "Texas Instruments, Inc. - SuperSparc-(II)"}, 96 /* SparcClassic -- borned STP1010TAB-50*/ 97 { 4, 1, "Texas Instruments, Inc. - MicroSparc"}, 98 { 4, 2, "Texas Instruments, Inc. - MicroSparc II"}, 99 { 4, 3, "Texas Instruments, Inc. - SuperSparc 51"}, 100 { 4, 4, "Texas Instruments, Inc. - SuperSparc 61"}, 101 { 4, 5, "Texas Instruments, Inc. - unknown"}, 102 { 5, 0, "Matsushita - MN10501"}, 103 { 6, 0, "Philips Corporation - unknown"}, 104 { 7, 0, "Harvest VLSI Design Center, Inc. - unknown"}, 105 /* Gallium arsenide 200MHz, BOOOOGOOOOMIPS!!! */ 106 { 8, 0, "Systems and Processes Engineering Corporation (SPEC)"}, 107 { 9, 0, "Fujitsu or Weitek Power-UP"}, 108 { 9, 1, "Fujitsu or Weitek Power-UP"}, 109 { 9, 2, "Fujitsu or Weitek Power-UP"}, 110 { 9, 3, "Fujitsu or Weitek Power-UP"}, 111 { 0xa, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 112 { 0xb, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 113 { 0xc, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 114 { 0xd, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 115 { 0xe, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 116 { 0xf, 0, "UNKNOWN CPU-VENDOR/TYPE"}, 117}; 118 119#define NSPARCCHIPS (sizeof(linux_sparc_chips)/sizeof(struct cpu_iu_info)) 120 121char *sparc_cpu_type[NR_CPUS] = { 0 }; 122char *sparc_fpu_type[NR_CPUS] = { 0 }; 123 124unsigned int fsr_storage; 125 126void __init cpu_probe(void) 127{ 128 int psr_impl, psr_vers, fpu_vers; 129 int i, cpuid, psr; 130 131 cpuid = hard_smp_processor_id(); 132 133 psr_impl = ((get_psr()>>28)&0xf); 134 psr_vers = ((get_psr()>>24)&0xf); 135 136 psr = get_psr(); 137 put_psr(psr | PSR_EF); 138 fpu_vers = ((get_fsr()>>17)&0x7); 139 put_psr(psr); 140 141 for(i = 0; i<NSPARCCHIPS; i++) { 142 if(linux_sparc_chips[i].psr_impl == psr_impl) 143 if(linux_sparc_chips[i].psr_vers == psr_vers) { 144 sparc_cpu_type[cpuid] = linux_sparc_chips[i].cpu_name; 145 break; 146 } 147 } 148 149 if(i==NSPARCCHIPS) 150 printk("DEBUG: psr.impl = 0x%x psr.vers = 0x%x\n", psr_impl, 151 psr_vers); 152 153 for(i = 0; i<NSPARCFPU; i++) { 154 if(linux_sparc_fpu[i].psr_impl == psr_impl) 155 if(linux_sparc_fpu[i].fp_vers == fpu_vers) { 156 sparc_fpu_type[cpuid] = linux_sparc_fpu[i].fp_name; 157 break; 158 } 159 } 160 161 if(i == NSPARCFPU) { 162 printk("DEBUG: psr.impl = 0x%x fsr.vers = 0x%x\n", psr_impl, 163 fpu_vers); 164 sparc_fpu_type[cpuid] = linux_sparc_fpu[31].fp_name; 165 } 166} 167