Searched refs:UART_CLK (Results 1 - 13 of 13) sorted by relevance
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/common/ |
H A D | dbg_io.c | 48 #define UART_CLK 0x28 /* Baud Rat4e Clock Divider */ macro 75 UART16550_WRITE(UART_CLK, divisor & 0xffff);
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H A D | power.c | 214 au_readl(UART_BASE + UART_CLK + 237 UART_BASE + UART_CLK +
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H A D | serial.c | 1126 serial_outp(info, UART_CLK, quot & 0xffff); 3051 serial_out(info, UART_CLK, quot & 0xffff);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/pb1100/ |
H A D | setup.c | 225 au_writel(0, UART0_ADDR + UART_CLK); 227 au_writel(0, UART1_ADDR + UART_CLK); 228 au_writel(0, UART3_ADDR + UART_CLK);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/pb1000/ |
H A D | setup.c | 275 au_writel(0, UART0_ADDR + UART_CLK); 277 au_writel(0, UART1_ADDR + UART_CLK); 278 au_writel(0, UART2_ADDR + UART_CLK); 279 au_writel(0, UART3_ADDR + UART_CLK);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sh/ |
H A D | smc37c93x.h | 160 #define UART_CLK (1843200) /* 1.8432 MHz */ macro 161 #define UART_BAUD(x) (UART_CLK / (16 * (x)))
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sh/ |
H A D | smc37c93x.h | 160 #define UART_CLK (1843200) /* 1.8432 MHz */ macro 161 #define UART_BAUD(x) (UART_CLK / (16 * (x)))
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/pb1500/ |
H A D | setup.c | 229 au_writel(0, UART0_ADDR + UART_CLK); 231 au_writel(0, UART3_ADDR + UART_CLK);
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/au1000/db1x00/ |
H A D | setup.c | 191 au_writel(0, UART0_ADDR + UART_CLK); 193 //au_writel(0, UART3_ADDR + UART_CLK);
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ |
H A D | au1000.h | 596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ |
H A D | au1000.h | 596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ |
H A D | au1000.h | 596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ |
H A D | au1000.h | 596 #define UART_CLK 0x28 /* Baud Rate Clock Divider */ macro
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