Searched refs:RTS (Results 1 - 24 of 24) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-arm/arch-anakin/
H A Dserial_reg.h37 #define RTS (1 << 2) macro
H A Duncompress.h54 | RTS | DTR | BLOCKRX | PARITY),
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-arm/arch-anakin/
H A Dserial_reg.h37 #define RTS (1 << 2) macro
H A Duncompress.h54 | RTS | DTR | BLOCKRX | PARITY),
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sbus/char/
H A Daurora.h57 * reversed DTR and RTS to make on-board automatic hardware flow
197 unsigned char RTS; member in struct:Aurora_board
219 * RTS, which makes the flow control usable. I hope that all the boards made
231 * activated by the on-board chip, and if the board has RTS and DTR swapped,
H A Daurora.c377 printk(KERN_INFO "aurora%d: Swapped DTR and RTS\n",bn);
379 bp->RTS=MSVR_DTR;
385 printk(KERN_INFO "aurora%d: Forcing swapped DTR-RTS\n",bn);
387 bp->RTS=MSVR_DTR;
392 printk(KERN_INFO "aurora%d: Normal DTR and RTS\n",bn);
394 bp->RTS=MSVR_RTS;
671 /* We don't have such things yet. My aurora board has DTR and RTS swapped, but that doesn't count in this driver. Let's hope
947 port->MSVR &= ~(bp->DTR|bp->RTS);
1085 /* And finally set RTS on */
1178 port->MSVR &= ~(bp->DTR|bp->RTS);
[all...]
H A Dzs.c349 /* Sets or clears DTR/RTS on the requested line */
356 ss->curregs[5] |= (RTS | DTR);
359 ss->curregs[5] &= ~(RTS | DTR);
1199 /* Turn off RTS line */
1201 info->curregs[5] &= ~RTS;
1226 /* Assert RTS line */
1228 info->curregs[5] |= RTS;
1343 result = ((info->curregs[5] & RTS) ? TIOCM_RTS : 0)
1363 info->curregs[5] |= RTS;
1369 info->curregs[5] &= ~RTS;
[all...]
H A Dzs.h270 #define RTS 0x2 /* RTS */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sgi/char/
H A Dsgiserial.c235 /* Sets or clears DTR/RTS on the requested line */
239 ss->curregs[5] |= (RTS | DTR);
243 ss->curregs[5] &= ~(RTS | DTR);
1124 /* Turn off RTS line */
1126 info->curregs[5] &= ~RTS;
1127 info->pendregs[5] &= ~RTS;
1152 /* Assert RTS line */
1154 info->curregs[5] |= RTS;
1155 info->pendregs[5] |= RTS;
1263 result = ((info->curregs[5] & RTS)
[all...]
H A Dsgiserial.h275 #define RTS 0x2 /* RTS */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/tc/
H A Dzs.c27 * 4 RTS <- ~A.RTS
36 * 23 DSRS(DTE) <- ~B.RTS
337 /* Sets or clears DTR/RTS on the requested line */
346 info->zs_chan_a->curregs[5] |= (which & (RTS | DTR));
348 info->zs_chan_a->curregs[5] &= ~(which & (RTS | DTR));
729 * Turn on RTS and DTR.
731 zs_rtsdtr(info, RTS | DTR, 1);
802 zs_rtsdtr(info, RTS | DTR, 0);
855 zs_rtsdtr(info, RTS | DT
[all...]
H A Dzs.h274 #define RTS 0x2 /* RTS */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/macintosh/
H A Dmacserial.c100 5, 0x6a, /* tx 8 bits, assert RTS (Tx8 | TxENAB | RTS) */
285 /* Sets or clears DTR/RTS on the requested line */
289 ss->curregs[5] |= (RTS | DTR);
291 ss->curregs[5] &= ~(RTS | DTR);
1033 * Turn on RTS and DTR.
1202 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1206 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
1238 /* set to 8 bits, no parity, 19200 baud, RTS on, DTR off */
1246 write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
[all...]
H A Dmacserial.h307 #define RTS 0x2 /* RTS */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/
H A Dfep.h126 #define RTS 0x02 macro
H A Dpcxx.c365 info->omodem |= DTR|RTS;
366 fepcmd(info, SETMODEM, DTR|RTS, 0, 10, 1);
467 ch->omodem = DTR|RTS;
468 fepcmd(ch, SETMODEM, DTR|RTS, 0, 10, 1);
555 * If we're a modem control device and HUPCL is on, drop RTS & DTR.
558 info->omodem &= ~(RTS|DTR);
559 fepcmd(info, SETMODEM, 0, DTR|RTS, 10, 1);
1915 res |= (CTS | RTS);
1918 res |= RTS;
1928 if (res & RTS)
[all...]
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/hamradio/
H A Dz8530.h89 #define RTS 0x2 /* RTS */ macro
227 #define AUTORTS 0x04 /* Auto RTS */
H A Dscc.c524 if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF)
933 scc->wreg[R5] |= RTS;
935 or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */
938 cl(scc,R5,RTS|TxENAB);
967 scc->wreg[R5] |= RTS;
969 or(scc,R5,RTS|TxENAB); /* enable tx */
972 cl(scc,R5,RTS|TxENAB); /* disable tx */
1107 if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) )
1153 if ( !(scc->wreg[R5] & RTS) )
[all...]
H A Ddmascc.c924 /* Assert RTS, start timer */
927 write_scc(priv, R5, TxCRC_ENAB | RTS | TxENAB | Tx8);
1278 write_scc(priv, R5, TxCRC_ENAB | RTS | TxENAB | Tx8);
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/wan/
H A Dz85230.c212 5, TxCRC_ENAB|RTS|TxENAB|Tx8|DTR,
237 5, TxCRC_ENAB|RTS|TxENAB|Tx8|DTR,
282 * z8530_rtsdtr - Control the outgoing DTS/RTS line
286 * Sets or clears DTR/RTS on the requested line. All locking is handled
287 * by the caller. For now we assume all boards use the actual RTS/DTR
295 c->regs[5] |= (RTS | DTR);
297 c->regs[5] &= ~(RTS | DTR);
787 * raise the RTS/DTR and commence network operation.
H A Dz85230.h109 #define RTS 0x2 /* RTS */ macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/usb/serial/
H A Dxircom_pgs.S63 * 3 : get/set "modem info" (pin states: DTR, RTS, DCD, RI, etc)
309 ;; mov a, #0x84 ; turn on RTS, DTR
321 mov a, #0x80 ; turn on RTS
449 ;; 03 is control pins (RTS, DTR).
725 mov a, r3 ; wValue[0] holds new bits: b7 is new RTS
H A Dkeyspan_pda.S63 * 3 : get/set "modem info" (pin states: DTR, RTS, DCD, RI, etc)
284 mov a, #0x84 ; turn on RTS, DTR
411 ;; 03 is control pins (RTS, DTR).
686 mov a, r3 ; wValue[0] holds new bits: b7 is new DTR, b2 is new RTS
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/compressed/
H A Dsbdreset_evb64120A.S167 .byte 5,0x6a /* tx 8/bit RTS & tx enable */
1011 li t0,MCR_DTR|MCR_RTS # Galileo |MCR_IENABLE # enable DTR & RTS
1039 li t0,MCR_DTR|MCR_RTS # Galileo |MCR_IENABLE # enable DTR & RTS

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