1/* 2 * linux/include/asm-arm/arch-anakin/serial_reg.h 3 * 4 * Copyright (C) 2001 Aleph One Ltd. for Acunia N.V. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Changelog: 11 * 09-Apr-2001 TTC Created 12 */ 13 14#ifndef ASM_ARCH_SERIAL_REG_H 15#define ASM_ARCH_SERIAL_REG_H 16 17/* 18 * Serial registers (other than tx/rx) 19 */ 20 21/* 22 * [UARTx + 0x10] 23 */ 24#define RXRELEASE (1 << 0) 25#define TXEMPTY (1 << 1) 26#define CTS (1 << 2) 27#define PRESCALER (31 << 3) 28#define SETBAUD(baud) ((230400 / (baud) - 1) << 3) 29#define GETBAUD(prescaler) (230400 / (((prescaler) >> 3) + 1)) 30 31 32/* 33 * [UARTx + 0x18] 34 */ 35#define IRQENABLE (1 << 0) 36#define SENDREQUEST (1 << 1) 37#define RTS (1 << 2) 38#define DTR (1 << 3) 39#define DCD (1 << 4) 40#define BLOCKRX (1 << 5) 41#define PARITY (3 << 6) 42#define SETPARITY(parity) ((parity) << 6) 43#define GETPARITY(parity) ((parity) >> 6) 44#define NONEPARITY (0) 45#define ODDPARITY (1) 46#define EVENPARITY (2) 47 48/* 49 * [UARTx + 0x1c] 50 */ 51#define TX (1 << 0) 52#define RX (1 << 1) 53#define OVERRUN (1 << 2) 54 55/* 56 * [UARTx + 0x20] 57 */ 58#define SETBREAK (1 << 0) 59 60/* 61 * Software interrupt register 62 */ 63#define TXENABLE (1 << 0) 64 65#endif 66