Searched refs:GT_PCI_IO_BASE (Results 1 - 16 of 16) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/gt64120/momenco_ocelot/
H A Dgt64120_dep.h26 #define GT_PCI_IO_BASE (0x20000000) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/gt64120/momenco_ocelot/
H A Dgt64120_dep.h26 #define GT_PCI_IO_BASE (0x20000000) macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/gt64120/momenco_ocelot/
H A Dgt64120_dep.h26 #define GT_PCI_IO_BASE (0x20000000) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/gt64120/momenco_ocelot/
H A Dgt64120_dep.h26 #define GT_PCI_IO_BASE (0x20000000) macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/galileo-boards/
H A Dev64120.h24 #define GT_PCI_IO_BASE 0x10000000 macro
H A Dev96100.h20 #define GT_PCI_IO_BASE 0x10000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/galileo-boards/
H A Dev64120.h24 #define GT_PCI_IO_BASE 0x10000000 macro
H A Dev96100.h20 #define GT_PCI_IO_BASE 0x10000000 macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/galileo-boards/
H A Dev64120.h24 #define GT_PCI_IO_BASE 0x10000000 macro
H A Dev96100.h20 #define GT_PCI_IO_BASE 0x10000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/galileo-boards/
H A Dev64120.h24 #define GT_PCI_IO_BASE 0x10000000 macro
H A Dev96100.h20 #define GT_PCI_IO_BASE 0x10000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev96100/
H A Dsetup.c147 ioport_resource.start = GT_PCI_IO_BASE;
148 ioport_resource.end = GT_PCI_IO_BASE + 0x01ffffff;
H A Dpci_ops.c63 #define GT_PCI_IO_BASE 0x10000000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/gt64120/momenco_ocelot/
H A Dsetup.c365 void *io_remap_range = ioremap(GT_PCI_IO_BASE, GT_PCI_IO_SIZE);
370 set_io_port_base(io_remap_range - GT_PCI_IO_BASE);
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/gt64120/common/
H A Dpci.c1121 ioport_resource.start = GT_PCI_IO_BASE;
1122 ioport_resource.end = GT_PCI_IO_BASE + GT_PCI_IO_SIZE - 1;

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