/linux-master/arch/csky/kernel/ |
H A D | io.c | 48 __raw_writel(*(u32 *)from, to); 80 __raw_writel(qc, dst);
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/linux-master/arch/sh/boot/romimage/ |
H A D | mmcif-sh7724.c | 42 __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); 75 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
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/linux-master/drivers/irqchip/ |
H A D | irq-ixp4xx.c | 80 __raw_writel(val, ixi->irqbase + IXP4XX_ICMR2); 84 __raw_writel(val, ixi->irqbase + IXP4XX_ICMR); 100 __raw_writel(val, ixi->irqbase + IXP4XX_ICMR2); 104 __raw_writel(val, ixi->irqbase + IXP4XX_ICMR); 216 __raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR); 219 __raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR); 223 __raw_writel(0x0, ixi->irqbase + IXP4XX_ICLR2); 226 __raw_writel(0x0, ixi->irqbase + IXP4XX_ICMR2);
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H A D | irq-ath79-misc.c | 67 __raw_writel(t | BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 80 __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_ENABLE); 93 __raw_writel(t & ~BIT(irq), base + AR71XX_RESET_REG_MISC_INT_STATUS); 125 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); 126 __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS);
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H A D | irq-mxs.c | 85 __raw_writel(BV_ICOLL_LEVELACK_IRQLEVELACK__LEVEL0, 91 __raw_writel(BM_ICOLL_INTR_ENABLE, 97 __raw_writel(BM_ICOLL_INTR_ENABLE, 103 __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE), 109 __raw_writel(ASM9260_BM_CLEAR_BIT(d->hwirq), 113 __raw_writel(icoll_intr_bitshift(d, BM_ICOLL_INTR_ENABLE), 138 __raw_writel(irqnr, icoll_priv.vector);
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/linux-master/arch/microblaze/include/asm/ |
H A D | io.h | 38 #define out_be32(a, v) __raw_writel((v), (void __iomem __force *)(a)) 48 #define out_le32(a, v) __raw_writel(__cpu_to_le32(v), (a))
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/linux-master/drivers/net/ethernet/xscale/ |
H A D | ptp_ixp46x.c | 64 __raw_writel(lo, ®s->systime_lo); 65 __raw_writel(hi, ®s->systime_hi); 113 __raw_writel(ack, ®s->event); 131 __raw_writel(addend, ®s->addend); 280 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend); 281 __raw_writel(1, &ixp_clock.regs->trgt_lo); 282 __raw_writel(0, &ixp_clock.regs->trgt_hi); 283 __raw_writel(TTIPEND, &ixp_clock.regs->event);
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/linux-master/arch/arm/mach-s3c/ |
H A D | pm-s3c64xx.c | 50 __raw_writel(val, S3C64XX_NORMAL_CFG); 65 __raw_writel(val, S3C64XX_NORMAL_CFG); 203 __raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK); 208 __raw_writel(0, S3C64XX_EINT_MASK); 235 __raw_writel(tmp, S3C64XX_PWR_CFG); 239 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), 280 __raw_writel(__pa_symbol(s3c_cpu_resume), S3C64XX_INFORM0); 283 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
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/linux-master/arch/mips/include/asm/mach-au1x00/ |
H A D | gpio-au1300.h | 49 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); 64 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL
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/linux-master/drivers/video/fbdev/ |
H A D | tgafb.c | 683 __raw_writel(fgcolor, regs_base + TGA_FOREGROUND_REG); 684 __raw_writel(bgcolor, regs_base + TGA_BACKGROUND_REG); 702 __raw_writel((is8bpp 716 __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); 729 __raw_writel(mask << shift, fb_base + pos); 735 __raw_writel(0xffffffff, regs_base + TGA_PIXELMASK_REG); 758 __raw_writel(mask, fb_base + pos + j*bincr); 767 __raw_writel(pixelmask, regs_base + TGA_PIXELMASK_REG); 778 __raw_writel(mask, fb_base + pos); 783 __raw_writel( [all...] |
/linux-master/arch/sh/mm/ |
H A D | cache-sh2a.c | 34 __raw_writel(data, CACHE_OC_ADDRESS_ARRAY | addr); 43 __raw_writel((addr & CACHE_PHYSADDR_MASK), cache_addr | addr); 73 __raw_writel(data & ~SH_CACHE_UPDATED, v); 136 __raw_writel(__raw_readl(SH_CCR) | CCR_OCACHE_INVALIDATE, 170 __raw_writel(__raw_readl(SH_CCR) | CCR_ICACHE_INVALIDATE,
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/linux-master/drivers/watchdog/ |
H A D | m54xx_wdt.c | 54 __raw_writel(gms0, MCF_GPT_GMS0); 55 __raw_writel(MCF_GPT_GCIR_PRE(heartbeat*(MCF_BUSCLK/0xffff)) | 58 __raw_writel(gms0, MCF_GPT_GMS0); 68 __raw_writel(gms0, MCF_GPT_GMS0); 77 __raw_writel(gms0, MCF_GPT_GMS0);
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/linux-master/arch/sh/drivers/dma/ |
H A D | dma-sh.c | 129 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); 163 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); 180 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); 200 __raw_writel(chcr, (dma_base_addr(chan->chan) + CHCR)); 231 __raw_writel(chan->sar, (dma_base_addr(chan->chan) + SAR)); 234 __raw_writel(chan->dar, (dma_base_addr(chan->chan) + DAR)); 236 __raw_writel(chan->count >> calc_xmit_shift(chan),
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/linux-master/drivers/ata/ |
H A D | pata_imx.c | 97 __raw_writel(val, priv->host_regs + PATA_IMX_ATA_CONTROL); 177 __raw_writel(PATA_IMX_ATA_CTRL_FIFO_RST_B | 181 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2, 201 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); 212 __raw_writel(0, priv->host_regs + PATA_IMX_ATA_INT_EN); 228 __raw_writel(priv->ata_ctl, priv->host_regs + PATA_IMX_ATA_CONTROL); 230 __raw_writel(PATA_IMX_ATA_INTR_ATA_INTRQ2,
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/linux-master/arch/arm/mach-lpc32xx/ |
H A D | common.c | 47 __raw_writel(savedval2 + 1, iramptr2); 52 __raw_writel(savedval2, iramptr2); 73 __raw_writel(tmp, LPC32XX_CLKPWR_MACCLK_CTRL);
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/linux-master/arch/sh/kernel/cpu/sh2/ |
H A D | smp-j2.c | 94 __raw_writel(entry_point, initpc); 95 __raw_writel(1, release); 122 __raw_writel(val | (1U<<28), j2_ipi_trigger + cpu);
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/linux-master/arch/sh/boards/ |
H A D | board-sh2007.c | 132 __raw_writel(CS5BCR_D, CS5BCR); 133 __raw_writel(CS5WCR_D, CS5WCR); 134 __raw_writel(CS5PCR_D, CS5PCR);
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/linux-master/arch/mips/ath79/ |
H A D | early_printk.c | 38 __raw_writel((unsigned char)ch, base + UART_TX * 4); 47 __raw_writel(AR933X_UART_DATA_TX_CSR | (unsigned char)ch, 94 __raw_writel(t, gpio_base + AR71XX_GPIO_REG_FUNC);
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/linux-master/arch/m68k/coldfire/ |
H A D | intc.c | 73 __raw_writel(imr | (0x1 << index), MCFSIM_IMR); 80 __raw_writel(imr & ~(0x1 << index), MCFSIM_IMR); 88 __raw_writel(imr, MCFSIM_IMR);
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/linux-master/drivers/i2c/busses/ |
H A D | i2c-iop3xx.c | 21 * - Use ioremap/__raw_readl/__raw_writel instead of direct dereference 59 __raw_writel(IOP3XX_ICR_UNIT_RESET, iop3xx_adap->ioaddr + CR_OFFSET); 60 __raw_writel(IOP3XX_ISR_CLEARBITS, iop3xx_adap->ioaddr + SR_OFFSET); 61 __raw_writel(0, iop3xx_adap->ioaddr + CR_OFFSET); 89 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 100 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 114 __raw_writel(sr, iop3xx_adap->ioaddr + SR_OFFSET); 244 __raw_writel(iic_cook_addr(msg), iop3xx_adap->ioaddr + DBR_OFFSET); 249 __raw_writel(cr, iop3xx_adap->ioaddr + CR_OFFSET); 263 __raw_writel(byt [all...] |
/linux-master/drivers/spi/ |
H A D | spi-bcmbca-hsspi.c | 154 __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG); 188 __raw_writel(reg, bs->spim_ctrl); 200 __raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg, 208 __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); 216 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); 284 __raw_writel(reg | 0xff, 301 __raw_writel(HSSPI_PINGx_CMD_DONE(0), 313 __raw_writel(reg, bs->regs + HSSPI_PINGPONG_COMMAND_REG(0)); 341 __raw_writel(reg, bs->regs + 351 __raw_writel(re [all...] |
/linux-master/arch/mips/pci/ |
H A D | pci-alchemy.c | 116 __raw_writel(r, ctx->regs + PCI_REG_STATCMD); 155 __raw_writel(*data, ctx->pci_cfg_vm->addr + offset); 175 __raw_writel(status & 0xf000ffff, ctx->regs + PCI_REG_STATCMD); 335 __raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM); 336 __raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH); 337 __raw_writel(ctx->pm[3], ctx->regs + PCI_REG_B2BBASE0_VID); 338 __raw_writel(ctx->pm[4], ctx->regs + PCI_REG_B2BBASE1_SID); 339 __raw_writel(ctx->pm[5], ctx->regs + PCI_REG_MWMASK_DEV); 340 __raw_writel(ctx->pm[6], ctx->regs + PCI_REG_MWBASE_REV_CCL); 341 __raw_writel(ct [all...] |
/linux-master/drivers/parisc/ |
H A D | dino.c | 185 __raw_writel(v, base_addr + DINO_PCI_ADDR); 220 __raw_writel(v & 0xffffff00, base_addr + DINO_PCI_ADDR); 224 __raw_writel(v, base_addr + DINO_PCI_ADDR); 260 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \ 277 __raw_writel((u32) addr, d->base_addr + DINO_PCI_ADDR); \ 305 __raw_writel(dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); 326 __raw_writel( dino_dev->imr, dino_dev->hba.base_addr+DINO_IMR); 363 __raw_writel(eim, dino_dev->hba.base_addr+DINO_IAR0); 551 __raw_writel(1 << i, base_addr + DINO_IO_ADDR_EN); 712 __raw_writel( [all...] |
/linux-master/drivers/soc/ixp4xx/ |
H A D | ixp4xx-npe.c | 172 __raw_writel(data, &npe->regs->exec_data); 173 __raw_writel(addr, &npe->regs->exec_addr); 174 __raw_writel(cmd, &npe->regs->exec_status_cmd); 179 __raw_writel(addr, &npe->regs->exec_addr); 180 __raw_writel(cmd, &npe->regs->exec_status_cmd); 202 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); 203 __raw_writel(CMD_NPE_START, &npe->regs->exec_status_cmd); 208 __raw_writel(CMD_NPE_STOP, &npe->regs->exec_status_cmd); 209 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); /*FIXME?*/ 232 __raw_writel(CMD_NPE_CLR_PIP [all...] |
/linux-master/drivers/mmc/host/ |
H A D | au1xmmc.c | 168 __raw_writel(val, HOST_CONFIG(host)); 176 __raw_writel(val | SD_CONFIG2_FF, HOST_CONFIG2(host)); 183 __raw_writel(val, HOST_CONFIG2(host)); 191 __raw_writel(val, HOST_CONFIG(host)); 203 __raw_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); 207 __raw_writel(STOP_CMD, HOST_CMD(host)); 302 __raw_writel(cmd->arg, HOST_CMDARG(host)); 305 __raw_writel((mmccmd | SD_CMD_GO), HOST_CMD(host)); 347 __raw_writel(SD_STATUS_WC | SD_STATUS_RC, HOST_STATUS(host)); 409 __raw_writel((unsigne [all...] |