Searched refs:set (Results 76 - 100 of 1536) sorted by path

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/freebsd-11-stable/contrib/gcc/
H A Dc-pragma.c150 enum { set, push, pop } action; enumerator in enum:__anon1192
158 action = set;
166 action = set;
199 action = set;
241 case set: SET_GLOBAL_ALIGNMENT (align); break;
391 applied to a decl whose DECL_ASSEMBLER_NAME is already set, and the
518 /* If the DECL_ASSEMBLER_NAME is already set, it does not change,
H A Dcfgloopanal.c26 #include "hard-reg-set.h"
488 rtx set; local
492 set = single_set (seq);
493 if (set)
494 cost += rtx_cost (set, SET);
511 /* Initialize the constants for computing set costs. */
H A Dcfgrtl.c47 #include "hard-reg-set.h"
601 the insn that set cc0. */
701 rtx set;
734 set = single_set (insn);
735 if (!set || side_effects_p (set))
851 /* Keep only one edge out and set proper flags. */
1226 the insn that set cc0. */
1784 error ("BB_RTL flag not set for block %d", bb->index);
2019 error ("bb prediction set fo
694 rtx set; local
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H A Dcombine.c29 and not used or set in between. LOG_LINKs never cross basic blocks.
30 They were set up by the preceding pass (lifetime analysis).
46 insn(s) values for the regs they set into the expressions in
70 the condition code for the insn that set the condition code.
86 #include "hard-reg-set.h"
190 last_set_invalid set to nonzero when it is not valid
228 used to store the mode in which the register was last set, the bits
229 that were known to be zero when it was last set, and the number of
230 sign bits copies it was known to have when it was last set. */
237 used. last_set_invalid is set nonzer
924 rtx set, note; local
1053 set_nonzero_bits_and_sign_copies(rtx x, rtx set, void *data ATTRIBUTE_UNUSED) argument
1141 rtx set = 0, src, dest; local
1487 rtx set = x ; local
1604 rtx set; local
1650 likely_spilled_retval_1(rtx x, rtx set, void *data) argument
3318 rtx i2_insn = 0, i2_val = 0, set; local
3349 rtx i1_insn = 0, i1_val = 0, set; local
11084 rtx links, set; local
12198 rtx set = single_set (tem); local
12470 rtx set, reg; local
[all...]
H A Dcse.c29 #include "hard-reg-set.h"
236 a comparison, else it is set to UNKNOWN and the other two
324 /* The SUBREG that was set when REG_TICK was last incremented. Set
409 Each set of expressions with equivalent values
433 The `is_const' flag is set if the element is a constant (including
471 register (hard registers may require `do_not_record' to be set). */
515 /* Get the SUBREG set at the last increment to REG_TICK (-1 if not a
1254 (set (reg:si 100) (reg:si 5))
1255 (set (reg:si 5) (reg:si 100))
1256 (set (re
3566 rtx set; local
4531 rtx set; local
4811 struct set struct
6667 invalidate_skipped_set(rtx dest, rtx set, void *data ATTRIBUTE_UNUSED) argument
7407 set_live_p(rtx set, rtx insn ATTRIBUTE_UNUSED, int *counts) argument
7468 rtx note, set, new; local
7714 rtx set; local
7911 rtx set; local
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H A Dcselib.c30 #include "hard-reg-set.h"
80 It is used in new_elt_loc_list to set SETTING_INSN. */
101 which the register was set; if the mode is unknown or the value is
112 /* Here the set of indices I with REG_VALUES(I) != 0 is saved. This is used
201 initialization. If CLEAR_ALL isn't set, then only clear the entries
270 /* Return true if X contains a VALUE rtx. If ONLY_USELESS is set, we
272 element has been set to zero, which implies the cselib_val will be
376 /* Return the mode in which a register was last set. If X is not a
378 set is not known, or the value was already clobbered, return
572 (set (re
1265 struct set struct
[all...]
H A Ddf-scan.c44 #include "hard-reg-set.h"
73 /* The set of hard registers in eliminables[i].from. */
502 and the set of blocks to analyze has been explicitly set, add
1162 /* A set to a non-paradoxical SUBREG for which the number of word_mode units
1200 /* It is legal to have a set destination be a parallel. */
1795 of their component registers set as well. */
1800 bitmap set = (bitmap) vset;
1805 bitmap_set_bit (set, regno);
1810 bitmap_set_bit (set, regn
1796 bitmap set = (bitmap) vset; local
[all...]
/freebsd-11-stable/contrib/gcc/config/arm/
H A Dieee754-df.S167 @ Keep absolute value in xh-xl-ip, sign in r5 (the n bit was set above)
H A Dieee754-sf.S121 @ Keep absolute value in r0-r1, sign in r3 (the n bit was set above)
736 @ The Z flag will be set iff the operands are equal.
769 subpls r0, r2, r3 @ if same sign compare values, set r0
H A Dlib1funcs.asm70 /* We use __ARM_ARCH__ set to 4 here, but in reality it's any processor with
299 #define EQUIV .set
310 .set SYM (__\new), SYM (__\old)
318 .set SYM (_L__\new), SYM (_L__\old)
354 .set shift, 32
356 .set shift, shift - 1
376 @ set curbit accordingly. This allows for curbit to be located
468 .set shift, 32
470 .set shift, shift - 1
1143 return address into the link register with the bottom bit set, an
[all...]
/freebsd-11-stable/contrib/gcc/config/i386/
H A Di386.c32 #include "hard-reg-set.h"
83 0, /* cost of multiply per each bit set */
137 COSTS_N_INSNS (1), /* cost of multiply per each bit set */
190 1, /* cost of multiply per each bit set */
243 0, /* cost of multiply per each bit set */
296 0, /* cost of multiply per each bit set */
349 0, /* cost of multiply per each bit set */
403 0, /* cost of multiply per each bit set */
456 0, /* cost of multiply per each bit set */
509 0, /* cost of multiply per each bit set */
4451 int set; local
4875 rtx set, mem; local
6898 static HOST_WIDE_INT set = -1; local
9826 rtx mask, set, use, clob, dst, src; local
10049 rtx set; local
14015 rtx set = PATTERN (insn); local
14070 rtx set, set2; local
14151 rtx set, set2; local
[all...]
H A Dsol2-c1.asm111 ! and the argument count on to the stack to set up the arguments
H A Dsol2-gc1.asm124 ! and the argument count on to the stack to set up the arguments
/freebsd-11-stable/contrib/gcc/config/mips/
H A Dirix-crti.asm2 .set noreorder
3 .set nomacro
12 The SGI linker instead accepts several -init options. It will set DT_INIT
H A Dmips.c33 #include "hard-reg-set.h"
107 /* Execute the following loop body with SUBINSN set to each instruction
455 /* True if the whole function is suitable for .set noreorder and
456 .set nomacro. */
571 /* Number of nested .set noreorder, noat, nomacro, and volatile requests. */
591 /* Which instruction set architecture to use. */
601 we always set TARGET_SOFT_FLOAT; this variable is nonzero if
2187 /* Shift VALUE right until its lowest bit is set. Shift arithmetically
2214 In this case, we know bit 16 is set and that the low 16 bits
2250 lowest bit is set
6787 rtx set; local
8981 rtx pattern, set; local
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H A Dmips16.S42 .set nomips16
60 .set noreorder; \
68 .set reorder; \
86 .set noreorder; \
93 .set reorder; \
159 .set noreorder
166 .set reorder
172 .set noreorder
179 .set reorder
236 .set noreorde
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H A Dvr4120-div.S25 .set nomips16
30 .set noreorder; \
33 .set reorder; \
36 .set noreorder; \
40 .set reorder; \
43 .set noreorder; \
48 .set reorder; \
50 .set noreorder; \
54 .set reorder; \
72 .set noreorde
[all...]
/freebsd-11-stable/contrib/gcc/config/rs6000/
H A Ddarwin-world.asm114 /* set R12 pointing at Vector Reg save area */
168 We now set up R7/R8 and jump to rest_world_eh_r7r8.
267 /* set SP to original value + R7 offset */
H A Drs6000.c30 #include "hard-reg-set.h"
248 /* True for any options that were explicitly set. */
1095 able to fit within the register set. */
1387 /* The e500 does not have string instructions, and we set
1394 /* For the powerpc-eabispe configuration, we set all these by
1395 default, so let's unset them if we manually set another
1665 /* The Darwin libraries never set errno, so we might as well
1847 /* ??? Don't set rs6000_explicit_options.abi here, to allow
2184 all items are set to the same value and contain COPIES replicas of the
2185 vsplt's operand; if STEP > 1, one in STEP elements is set t
3786 rtx result, insn, set; local
5634 int first_reg_offset, set; local
13811 static GTY(()) int set = -1; variable
14042 rtx set = real; local
14065 rtx set = XVECEXP (real, 0, i); local
14489 rtx set; local
14694 rtx set; local
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H A Dsol-ci.asm105 .set environ,_environ
H A Dsol-cn.asm46 .set _ex_register,0
47 .set _ex_deregister,0
/freebsd-11-stable/contrib/gcc/config/s390/
H A Ds390.c32 #include "hard-reg-set.h"
234 /* Which instruction set architecture to use. */
277 This flag is set by s390_return_addr_rtx if it could not use
390 /* Return true if SET either doesn't set the CC register, or else
395 s390_match_ccmode_set (rtx set, enum machine_mode req_mode) argument
399 gcc_assert (GET_CODE (set) == SET);
401 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
404 set_mode = GET_MODE (SET_DEST (set));
438 return (GET_MODE (SET_SRC (set))
461 rtx set = XVECEXP (PATTERN (insn), 0, i); local
8977 rtx set, base, offset; local
[all...]
/freebsd-11-stable/contrib/gcc/config/sparc/
H A Dlb1spc.asm186 ! This means that %o3 has the high-order bit set.
210 ! order bit set in the first step, just falling into the regular
248 tst %o3 ! set up for initial iteration
533 ! This means that %o3 has the high-order bit set.
557 ! order bit set in the first step, just falling into the regular
595 tst %o3 ! set up for initial iteration
H A Dsol2-c1.asm53 #define setn(s, scratch, dst) set s, dst
H A Dsparc.c33 #include "hard-reg-set.h"
240 ACTUAL_FSIZE is set by sparc_compute_frame_size() which is called during the
252 /* The alias set for prologue/epilogue register save/restore. */
255 /* The alias set for the structure return value. */
420 /* CPU type. This is set from TARGET_CPU_DEFAULT and -m{cpu,tune}=xxx. */
1320 which bits are set for a HIGH, they are unspecified.
1582 /* If there are no bits set this should have gone out
1746 /* Now a range of 22 or less bits set somewhere.
1867 /* So what we know is that the set bits straddle the
2026 (set (re
2686 rtx set = single_set (insn); local
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