config/mips/mips.c

33 #include "hard-reg-set.h"
107 /* Execute the following loop body with SUBINSN set to each instruction
455   /* True if the whole function is suitable for .set noreorder and
456      .set nomacro.  */
571 /* Number of nested .set noreorder, noat, nomacro, and volatile requests.  */
591 /* Which instruction set architecture to use.  */
601    we always set TARGET_SOFT_FLOAT; this variable is nonzero if
2187   /* Shift VALUE right until its lowest bit is set.  Shift arithmetically
2214 	 In this case, we know bit 16 is set and that the low 16 bits
2250 	 lowest bit is set.  We don't want to shift in this case.  */
2366 /* If (set DEST SRC) is not a valid instruction, emit an equivalent
2834 	(set (reg:SI $f0) (mem:SI ...))
2835 	(set (reg:SI $f1) (mem:SI ...))
3042 /* Emit an instruction of the form (set TARGET (CODE OP0 OP1)).  */
3128    the same integer mode.  If INVERT_PTR is nonnull, it's OK to set
3256 	 set a condition code register.  The branch or conditional move
3311    (set temp (COND:CCV2 CMP_OP0 CMP_OP1))
3312    (set DEST (unspec [TRUE_SRC FALSE_SRC temp] UNSPEC_MOVE_TF_PS))  */
4555 /* Try to emit the equivalent of (set DEST (zero_extract SRC WIDTH BITPOS)).
4596 /* Try to expand (set (zero_extract DEST WIDTH BITPOS) SRC).  Return
4867 	 on the command line, set MASK_BRANCHLIKELY based on the target
4901       /* We need to set flag_pic for executables as well as DSOs
5306    avoid shuffling registers around in order to set up for an xor,
5395    '('	Turn on .set noreorder
5396    ')'	Turn on .set reorder
5397    '['	Turn on .set noat
5398    ']'	Turn on .set at
5399    '<'	Turn on .set nomacro
5400    '>'	Turn on .set macro
5401    '{'	Turn on .set volatile (not GAS)
5402    '}'	Turn on .set novolatile (not GAS)
5403    '&'	Turn on .set noreorder if filling delay slots
5404    '*'	Turn on both .set noreorder and .set nomacro if filling delay slots
5405    '!'	Turn on .set nomacro if filling delay slots
5406    '#'	Print nop if in a .set noreorder section.
5452 	    fputs (".set\tnoreorder\n\t", file);
5459 		fputs (".set\tnoreorder\n\t", file);
5462 		fputs (".set\tnomacro\n\t", file);
5468 	    fputs ("\n\t.set\tnomacro", file);
5486 	    fputs (".set\tnoreorder\n\t", file);
5494 	    fputs ("\n\t.set\treorder", file);
5500 	    fputs (".set\tnoat\n\t", file);
5507 	    fputs ("\n\t.set\tat", file);
5513 	    fputs (".set\tnomacro\n\t", file);
5520 	    fputs ("\n\t.set\tmacro", file);
5526 	    fputs ("#.set\tvolatile\n\t", file);
5533 	    fputs ("\n\t#.set\tnovolatile", file);
5958     fprintf (asm_out_file, "\t.set\tmips16\n");
6013 		 an optimization (skipping over the insns that set $gp)
6281 	  (set (reg:DF R1) (float:DF (reg:SI R2)))
6435   /* The space set aside by STARTING_FRAME_OFFSET isn't needed in leaf
6678    to set up the global pointer.  */
6826   rtx set;
6835   set = gen_rtx_SET (VOIDmode, mem, reg);
6836   RTX_FRAME_RELATED_P (set) = 1;
6838   return set;
7004       output_asm_insn (".set\tmacro", 0);
7005       output_asm_insn (".set\treorder", 0);
7299   /* Clean up the vars set above.  Note that final_end_function resets
8047   fprintf (file, "\t.set\tnomips16\n");
8064   fprintf (file, "\t.set\tnoreorder\n");
8068   fprintf (asm_out_file, "\t.set\tnoat\n");
8073   fprintf (asm_out_file, "\t.set\tat\n");
8082   fprintf (file, "\t.set\treorder\n");
8091   fprintf (file, "\t.set\tmips16\n");
8279       fprintf (asm_out_file, "\t.set\tnomips16\n");
8297       fprintf (asm_out_file, "\t.set\tnoreorder\n");
8303 	  fprintf (asm_out_file, "\t.set\tnoat\n");
8307 	  fprintf (asm_out_file, "\t.set\tat\n");
8351       fprintf (asm_out_file, "\t.set\treorder\n");
8364       fprintf (asm_out_file, "\t.set\tmips16\n");
8466      When adding the first constant, set the pool's highest address to
8659   /* LAST_SET[X].INSN is the last instruction to set register X.
8661      INSN is null if no instruction has yet set register X.  */
8776 /* mips_sim_insn has just set X.  Update the LAST_SET array
9030   rtx pattern, set;
9038   /* Do not put the whole function in .set noreorder if it contains
9080 	set = single_set (insn);
9081 	gcc_assert (set != 0);
9082 	*delayed_reg = SET_DEST (set);
9089    See if the whole function can then be put into .set noreorder &
9090    .set nomacro.  */
9230    If reload sees an insn consisting of a single `set' between two
9554 	       data word, where the bits 5..2 are set, then R4000 would