Searched refs:dma_resv (Results 51 - 75 of 76) sorted by relevance
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/linux-master/drivers/gpu/drm/nouveau/ |
H A D | nouveau_fence.c | 361 struct dma_resv *resv = nvbo->bo.base.resv;
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H A D | nouveau_gem.c | 241 struct dma_resv *resv = NULL;
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/linux-master/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_ids.c | 106 void amdgpu_pasid_free_delayed(struct dma_resv *resv,
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H A D | amdgpu_gem.c | 101 struct dma_resv *resv, 320 struct dma_resv *resv = NULL;
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H A D | amdgpu_vm.c | 914 struct dma_resv *resv, uint64_t start, uint64_t last, 1128 struct dma_resv *resv; 1353 struct dma_resv *resv = vm->root.bo->tbo.base.resv; 1383 struct dma_resv *resv = vm->root.bo->tbo.base.resv; 1435 struct dma_resv *resv;
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H A D | amdgpu_ttm.c | 291 struct dma_resv *resv, 2112 struct dma_resv *resv, 2144 struct dma_resv *resv, 2198 struct dma_resv *resv, 2235 struct dma_resv *resv,
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H A D | amdgpu_vm_pt.c | 452 struct dma_resv *resv;
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H A D | amdgpu_object.c | 1440 struct dma_resv *resv = bo->tbo.base.resv; 1468 int amdgpu_bo_sync_wait_resv(struct amdgpu_device *adev, struct dma_resv *resv,
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H A D | amdgpu_cs.c | 1196 struct dma_resv *resv = bo->tbo.base.resv;
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/linux-master/drivers/gpu/drm/etnaviv/ |
H A D | etnaviv_gem_submit.c | 180 struct dma_resv *robj = bo->obj->base.resv;
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H A D | etnaviv_gem.c | 434 struct dma_resv *robj = obj->resv;
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/linux-master/drivers/gpu/drm/imagination/ |
H A D | pvr_vm.c | 92 * pvr_vm_get_dma_resv() - Expose the dma_resv owned by the VM context. 95 * This is used to allow private BOs to share a dma_resv for faster fence 98 * Returns: The dma_resv pointer. 100 struct dma_resv *pvr_vm_get_dma_resv(struct pvr_vm_context *vm_ctx)
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/linux-master/drivers/gpu/drm/ttm/tests/ |
H A D | ttm_bo_test.c | 129 * dma_resv lock of bo2 so the other context is "wounded" and has to back off 416 struct dma_resv *external_resv;
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/linux-master/drivers/gpu/drm/loongson/ |
H A D | lsdc_ttm.c | 438 struct dma_resv *resv)
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/linux-master/drivers/gpu/drm/ |
H A D | drm_mode_config.c | 441 struct dma_resv resv;
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/linux-master/drivers/gpu/drm/radeon/ |
H A D | cik_sdma.c | 581 struct dma_resv *resv)
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H A D | radeon_cs.c | 257 struct dma_resv *resv;
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H A D | radeon.h | 582 struct dma_resv *resv, 1908 struct dma_resv *resv); 1914 struct dma_resv *resv); 1921 struct dma_resv *resv);
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H A D | r100.c | 904 struct dma_resv *resv)
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H A D | r600.c | 2966 struct dma_resv *resv)
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/linux-master/drivers/gpu/drm/scheduler/ |
H A D | sched_main.c | 828 * &drm_sched_job.s_fence of @job, so that it can be attached to struct dma_resv 930 * @resv: the dma_resv object to get the fences from 940 struct dma_resv *resv,
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/linux-master/drivers/gpu/drm/i915/display/ |
H A D | intel_atomic_plane.c | 1018 static int add_dma_resv_fences(struct dma_resv *resv,
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/linux-master/drivers/gpu/drm/msm/ |
H A D | msm_gem.c | 516 * and and that the object's dma_resv has the fence for the current 926 struct dma_resv *robj = obj->resv;
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/linux-master/drivers/gpu/drm/xe/ |
H A D | xe_migrate.c | 619 static int job_add_deps(struct xe_sched_job *job, struct dma_resv *resv,
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H A D | xe_bo.c | 561 * to the buffer object's dma_resv object, that signals when access is 562 * stopped. The caller will wait on all dma_resv fences before 1204 struct xe_tile *tile, struct dma_resv *resv, 1779 * @vm: Pointer to a the vm the bo shares a locked dma_resv object with, or 2040 * xe_bo_lock() - Lock the buffer object's dma_resv object 2044 * Locks the buffer object's dma_resv object. If the buffer object is 2045 * pointing to a shared dma_resv object, that shared lock is locked. 2062 * xe_bo_unlock() - Unlock the buffer object's dma_resv object
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