Searched refs:__raw_readl (Results 51 - 75 of 424) sorted by relevance

1234567891011>>

/linux-master/drivers/soc/ixp4xx/
H A Dixp4xx-qmgr.c43 val = __raw_readl(&qmgr_regs->acc[queue][0]);
55 return (__raw_readl(&qmgr_regs->stat1[queue >> 3])
62 return (__raw_readl(&qmgr_regs->stat2[queue >> 4])
87 return (__raw_readl(&qmgr_regs->statne_h) >>
101 return (__raw_readl(&qmgr_regs->statf_h) >>
129 __raw_writel((__raw_readl(reg) & ~(7 << bit)) | (src << bit),
149 en_bitmap = __raw_readl(&qmgr_regs->irqen[0]);
153 src = __raw_readl(&qmgr_regs->irqsrc[i >> 3]);
154 stat = __raw_readl(&qmgr_regs->stat1[i >> 3]);
174 req_bitmap = __raw_readl(
[all...]
/linux-master/arch/mips/ath79/
H A Dclock.c105 pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG);
131 pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG);
165 clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG);
178 cpu_config = __raw_readl(pll_base + AR933X_PLL_CPU_CONFIG_REG);
253 pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG);
257 pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL1_REG);
265 pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG);
280 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL2_REG);
284 pll = __raw_readl(dpll_base + AR934X_SRIF_DDR_DPLL1_REG);
292 pll = __raw_readl(pll_bas
[all...]
H A Dearly_printk.c27 t = __raw_readl(reg);
92 t = __raw_readl(gpio_base + AR71XX_GPIO_REG_FUNC);
103 id = __raw_readl(base + AR71XX_RESET_REG_REV_ID);
/linux-master/arch/mips/pci/
H A Dpci-ar71xx.c113 pci_err = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR) & 3;
118 addr = __raw_readl(base + AR71XX_PCI_REG_PCI_ERR_ADDR);
127 ahb_err = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR) & 1;
132 addr = __raw_readl(base + AR71XX_PCI_REG_AHB_ERR_ADDR);
193 data = __raw_readl(base + AR71XX_PCI_REG_CFG_RDDATA);
234 pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
235 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
263 t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
267 __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
280 t = __raw_readl(bas
[all...]
/linux-master/arch/sh/include/mach-common/mach/
H A Dmagicpanelr2.h21 #define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg)
24 #define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg)
/linux-master/arch/sh/drivers/pci/
H A Dfixups-rts7751r2d.c43 bcr1 = __raw_readl(SH7751_BCR1);
54 mcr = __raw_readl(SH7751_MCR);
H A Dfixups-landisk.c43 bcr1 = __raw_readl(SH7751_BCR1);
47 mcr = __raw_readl(SH7751_MCR);
/linux-master/arch/mips/ralink/
H A Dearly_printk.c42 return __raw_readl(uart_membase + reg);
48 (__raw_readl(chipid_membase) == MT7628_CHIP_NAME1);
/linux-master/drivers/clk/imx/
H A Dclk-pllv2.c118 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
119 dp_op = __raw_readl(pllbase + MXC_PLL_DP_OP);
120 dp_mfd = __raw_readl(pllbase + MXC_PLL_DP_MFD);
121 dp_mfn = __raw_readl(pllbase + MXC_PLL_DP_MFN);
170 dp_ctl = __raw_readl(pllbase + MXC_PLL_DP_CTL);
203 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN;
208 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL);
230 reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) & ~MXC_PLL_DP_CTL_UPEN;
/linux-master/arch/sh/include/asm/
H A Dwatchdog.h68 return __raw_readl(WTCNT_R);
101 return __raw_readl(WTCSR_R);
/linux-master/arch/sh/mm/
H A Dcache-debugfs.c39 ccr = __raw_readl(SH_CCR);
77 unsigned long data = __raw_readl(addr);
/linux-master/arch/sh/boot/romimage/
H A Dmmcif-sh7724.c42 __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2);
75 __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2);
/linux-master/arch/microblaze/include/asm/
H A Dio.h41 #define in_be32(a) __raw_readl((const void __iomem __force *)(a))
51 #define in_le32(a) __le32_to_cpu(__raw_readl(a))
/linux-master/arch/mips/include/asm/mach-au1x00/
H A Dgpio-au1300.h37 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit;
114 v = __raw_readl(roff + AU1300_GPIC_RSTVAL);
/linux-master/arch/m68k/coldfire/
H A Ddma_timer.c40 return __raw_readl(DTCN0);
79 unsigned long cycl = __raw_readl(DTCN0);
H A Dsltimers.c101 scnt = __raw_readl(TA(MCFSLT_SCNT));
103 if (__raw_readl(TA(MCFSLT_SSR)) & MCFSLT_SSR_TE) {
105 scnt = __raw_readl(TA(MCFSLT_SCNT));
H A Dintc.c72 imr = __raw_readl(MCFSIM_IMR);
79 imr = __raw_readl(MCFSIM_IMR);
86 imr = __raw_readl(MCFSIM_IMR);
/linux-master/drivers/char/hw_random/
H A Dmxc-rnga.c68 int level = (__raw_readl(mxc_rng->mem + RNGA_STATUS) &
84 *data = __raw_readl(mxc_rng->mem + RNGA_OUTPUT_FIFO);
87 err = __raw_readl(mxc_rng->mem + RNGA_STATUS) & RNGA_STATUS_ERROR_INT;
92 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
106 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
110 osc = __raw_readl(mxc_rng->mem + RNGA_STATUS);
117 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
128 ctrl = __raw_readl(mxc_rng->mem + RNGA_CONTROL);
/linux-master/sound/soc/au1x/
H A Dpsc-i2s.c120 stat = __raw_readl(I2S_STAT(pscdata));
123 cfgbits = __raw_readl(I2S_CFG(pscdata));
153 while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
166 while (!(__raw_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
187 stat = __raw_readl(I2S_STAT(pscdata));
201 while (!(__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
222 while ((__raw_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
226 stat = __raw_readl(I2S_STAT(pscdata));
321 sel = __raw_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
363 wd->pm[0] = __raw_readl(PSC_SE
[all...]
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dperf_event.c229 return __raw_readl(PPC_PMCTR(idx));
236 tmp = __raw_readl(PPC_CCBR(idx));
245 tmp = __raw_readl(PPC_PMCAT);
250 tmp = __raw_readl(PPC_CCBR(idx));
254 __raw_writel(__raw_readl(PPC_CCBR(idx)) | CCBR_DUC, PPC_CCBR(idx));
262 __raw_writel(__raw_readl(PPC_CCBR(i)) & ~CCBR_DUC, PPC_CCBR(i));
270 __raw_writel(__raw_readl(PPC_CCBR(i)) | CCBR_DUC, PPC_CCBR(i));
/linux-master/arch/sparc/lib/
H A DPeeCeeI.c152 *pi++ = __raw_readl(addr);
162 l = __raw_readl(addr);
166 l2 = __raw_readl(addr);
177 l = __raw_readl(addr);
183 l2 = __raw_readl(addr);
194 l = __raw_readl(addr);
198 l2 = __raw_readl(addr);
/linux-master/drivers/input/keyboard/
H A Dgoldfish_events.c41 type = __raw_readl(edev->addr + REG_READ);
42 code = __raw_readl(edev->addr + REG_READ);
43 value = __raw_readl(edev->addr + REG_READ);
60 size = __raw_readl(addr + REG_LEN) * 8;
83 count = __raw_readl(addr + REG_LEN) / sizeof(val);
94 val[j] = __raw_readl(edev->addr + REG_DATA + offset);
126 keymapnamelen = __raw_readl(addr + REG_LEN);
/linux-master/drivers/net/ethernet/xscale/
H A Dptp_ixp46x.c46 lo = __raw_readl(&regs->systime_lo);
47 hi = __raw_readl(&regs->systime_hi);
79 val = __raw_readl(&regs->event);
84 hi = __raw_readl(&regs->asms_hi);
85 lo = __raw_readl(&regs->asms_lo);
98 hi = __raw_readl(&regs->amms_hi);
99 lo = __raw_readl(&regs->amms_lo);
/linux-master/drivers/soc/bcm/brcmstb/pm/
H A Dpm-mips.c138 tmp = __raw_readl(base + AON_CTRL_HOST_MISC_CMDS);
141 (void)__raw_readl(base + AON_CTRL_HOST_MISC_CMDS);
144 (void)__raw_readl(base + AON_CTRL_PM_INITIATE);
165 (void)__raw_readl(base + AON_CTRL_PM_CPU_WAIT_COUNT);
169 (void)__raw_readl(base + AON_CTRL_PM_CTRL);
173 (void)__raw_readl(base + AON_CTRL_PM_CTRL);
194 tmp = __raw_readl(ctrl.aon_ctrl_base + AON_CTRL_RESET_CTRL);
202 tmp = __raw_readl(ctrl.memcs[i].ddr_phy_base +
219 s3_context.memc0_rts[i] = __raw_readl(memc_arb_base);
/linux-master/arch/mips/include/asm/vdso/
H A Dgettimeofday.h176 hi = __raw_readl(gic + sizeof(lo));
177 lo = __raw_readl(gic);
178 hi2 = __raw_readl(gic + sizeof(lo));

Completed in 229 milliseconds

1234567891011>>