1// SPDX-License-Identifier: GPL-2.0
2/*
3 * arch/sh/drivers/pci/fixups-rts7751r2d.c
4 *
5 * RTS7751R2D / LBOXRE2 PCI fixups
6 *
7 * Copyright (C) 2003  Lineo uSolutions, Inc.
8 * Copyright (C) 2004  Paul Mundt
9 * Copyright (C) 2007  Nobuhiro Iwamatsu
10 */
11#include <linux/pci.h>
12#include <mach/lboxre2.h>
13#include <mach/r2d.h>
14#include "pci-sh4.h"
15#include <generated/machtypes.h>
16
17#define PCIMCR_MRSET_OFF	0xBFFFFFFF
18#define PCIMCR_RFSH_OFF		0xFFFFFFFB
19
20static u8 rts7751r2d_irq_tab[] = {
21	IRQ_PCI_INTA,
22	IRQ_PCI_INTB,
23	IRQ_PCI_INTC,
24	IRQ_PCI_INTD,
25};
26
27static char lboxre2_irq_tab[] = {
28	IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
29};
30
31int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
32{
33	if (mach_is_lboxre2())
34		return lboxre2_irq_tab[slot];
35	else
36		return rts7751r2d_irq_tab[slot];
37}
38
39int pci_fixup_pcic(struct pci_channel *chan)
40{
41	unsigned long bcr1, mcr;
42
43	bcr1 = __raw_readl(SH7751_BCR1);
44	bcr1 |= 0x40080000;	/* Enable Bit 19 BREQEN, set PCIC to slave */
45	pci_write_reg(chan, bcr1, SH4_PCIBCR1);
46
47	/* Enable all interrupts, so we known what to fix */
48	pci_write_reg(chan, 0x0000c3ff, SH4_PCIINTM);
49	pci_write_reg(chan, 0x0000380f, SH4_PCIAINTM);
50
51	pci_write_reg(chan, 0xfb900047, SH7751_PCICONF1);
52	pci_write_reg(chan, 0xab000001, SH7751_PCICONF4);
53
54	mcr = __raw_readl(SH7751_MCR);
55	mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
56	pci_write_reg(chan, mcr, SH4_PCIMCR);
57
58	pci_write_reg(chan, 0x0c000000, SH7751_PCICONF5);
59	pci_write_reg(chan, 0xd0000000, SH7751_PCICONF6);
60	pci_write_reg(chan, 0x0c000000, SH4_PCILAR0);
61	pci_write_reg(chan, 0x00000000, SH4_PCILAR1);
62
63	return 0;
64}
65