Searched refs:bpp (Results 51 - 75 of 466) sorted by last modified time

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/linux-master/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c579 u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format); local
590 pclk_bpp = mult_frac(pclk_rate, bpp, 16 * lanes);
592 pclk_bpp = mult_frac(pclk_rate, bpp, 8 * lanes);
622 u32 bpp = mipi_dsi_pixel_format_to_bpp(msm_host->format); local
628 msm_host->src_clk_rate = mult_frac(msm_host->pixel_clk_rate, bpp, 8);
1805 /* handle only bpp = bpc = 8, pre-SCR panels */
/linux-master/drivers/gpu/drm/msm/dp/
H A Ddp_panel.c95 u32 bpp = 0, data_rate_khz = 0; local
97 bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
102 while (bpp > min_supported_bpp) {
103 if (mode_pclk_khz * bpp <= data_rate_khz)
105 bpp -= 6;
108 return bpp;
200 u32 bpp; local
210 bpp = dp_link_bit_depth_to_bpp(
213 bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp,
216 return bpp;
[all...]
H A Ddp_panel.h18 u32 bpp; member in struct:dp_display_mode
H A Ddp_link.h74 * mdss_dp_test_bit_depth_to_bpp() - convert test bit depth to bpp
77 * Returns the bits per pixel (bpp) to be used corresponding to the
103 u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp);
H A Ddp_link.c1178 u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp) argument
1190 switch (bpp) {
1201 drm_dbg_dp(link->drm_dev, "bpp=%d not supported, use bpc=8\n",
1202 bpp);
H A Ddp_display.c808 dp->panel->dp_mode.bpp = mode->bpp;
1616 dp_display->dp_mode.bpp = dp_display_get_test_bpp(dp);
1618 dp_display->dp_mode.bpp = dp->connector->display_info.bpc * 3;
1620 if (!dp_display->dp_mode.bpp)
1621 dp_display->dp_mode.bpp = 24; /* Default bpp */
H A Ddp_ctrl.c49 int bpp; /* bits */ member in struct:dp_tu_calc_input
62 u8 bpp; member in struct:dp_vc_tu_mapping_table
153 ctrl->panel->dp_mode.bpp);
187 ctrl->panel->dp_mode.bpp);
206 int bpp; member in struct:tu_algo_data
337 tu->bpp = in->bpp;
353 switch (tu->bpp) {
355 tu->bpp = 16;
359 tu->bpp
[all...]
H A Ddp_debug.c67 debug->panel->dp_mode.bpp);
/linux-master/drivers/gpu/drm/msm/disp/
H A Dmdp_format.c82 .bpp = bp, \
102 .bpp = bp, \
122 .bpp = bp, \
141 .bpp = 2, \
161 .bpp = 2, \
180 .bpp = 2, \
200 .bpp = 2, \
220 .bpp = bp, \
H A Dmdp_format.h45 * @bpp: bytes per pixel
60 u8 bpp; member in struct:msm_format
/linux-master/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_plane.c792 MDP5_PIPE_SRC_FORMAT_CPP(format->bpp - 1) |
/linux-master/drivers/gpu/drm/msm/disp/mdp4/
H A Dmdp4_plane.c307 MDP4_PIPE_SRC_FORMAT_CPP(format->bpp - 1) |
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_plane.c112 * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
140 plane_bit_rate = plane_pixel_rate * fmt->bpp;
204 if (!fmt || !pipe || !src_width || !fmt->bpp) {
221 ((src_width + 32) * fmt->bpp);
225 ((src_width + 32) * fmt->bpp);
230 ((src_width + 32) * fmt->bpp);
233 ((src_width + 32) * fmt->bpp);
H A Ddpu_hw_wb.c103 ((fmt->bpp - 1) << 9);
H A Ddpu_hw_sspp.c270 ((fmt->bpp - 1) << 9);
H A Ddpu_formats.c193 layout->plane_size[0] = width * height * layout->format->bpp;
194 layout->plane_pitch[0] = width * layout->format->bpp;
198 uint32_t bpp = 1; local
211 bpp = 2;
212 layout->plane_pitch[0] = width * bpp;
/linux-master/drivers/gpu/drm/mgag200/
H A Dmgag200_mode.c331 unsigned int bpp, bppshift, scale; local
334 bpp = format->cpp[0] * 8;
337 switch (bpp) {
348 switch (bpp) {
/linux-master/drivers/gpu/drm/meson/
H A Dmeson_dw_mipi_dsi.c163 int bpp; local
167 bpp = mipi_dsi_pixel_format_to_bpp(mipi_dsi->dsi_device->format);
170 bpp, mipi_dsi->dsi_device->lanes,
/linux-master/drivers/gpu/drm/mediatek/
H A Dmtk_dsi.c790 int bpp; local
792 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format);
793 if (bpp < 0)
796 if (mode->clock * bpp / dsi->lanes > 1500000)
H A Dmtk_dp.c2321 u32 bpp = info->color_formats & DRM_COLOR_FORMAT_YCBCR422 ? 16 : 24; local
2327 if (rate < mode->clock * bpp / 8)
/linux-master/drivers/gpu/drm/loongson/
H A Dlsdc_gem.c215 if (args->bpp != 32 && args->bpp != 16)
218 pitch = args->width * args->bpp / 8;
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dfb_decoder.c48 int bpp; /* Bits per pixel, 0 indicates invalid */ member in struct:pixel_format
61 /* non-supported format has bpp default to 0 */
81 /* non-supported format has bpp default to 0 */
151 u32 tiled, int stride_mask, int bpp)
170 if (bpp == 8)
172 else if (bpp == 16 || bpp == 32 || bpp == 64)
175 gvt_dbg_core("skl: unsupported bpp:%d\n", bpp);
150 intel_vgpu_get_stride(struct intel_vgpu *vgpu, int pipe, u32 tiled, int stride_mask, int bpp) argument
286 u8 bpp; /* Bits per pixel; 0 indicates invalid */ member in struct:cursor_mode_format
[all...]
/linux-master/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_client_blt.c30 static int linear_x_y_to_ftiled_pos(int x, int y, u32 stride, int bpp) argument
35 int pixel_size = bpp / 8;
/linux-master/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c53 static u16 txbyteclkhs(u16 pixels, int bpp, int lane_count, argument
56 return DIV_ROUND_UP(DIV_ROUND_UP(pixels * bpp * burst_mode_ratio,
61 static u16 pixels_from_txbyteclkhs(u16 clk_hs, int bpp, int lane_count, argument
65 (bpp * burst_mode_ratio));
1023 unsigned int bpp, fmt; local
1043 bpp = mipi_dsi_pixel_format_to_bpp(
1074 hfp = pixels_from_txbyteclkhs(hfp, bpp, lane_count,
1076 hsync = pixels_from_txbyteclkhs(hsync, bpp, lane_count,
1078 hbp = pixels_from_txbyteclkhs(hbp, bpp, lane_count,
1127 hfp_sw = txbyteclkhs(hfp_sw, bpp, lane_coun
1222 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
1313 unsigned int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
[all...]
H A Dvlv_dsi_pll.c51 u32 bpp = mipi_dsi_pixel_format_to_bpp(fmt); local
55 dsi_clk_khz = DIV_ROUND_CLOSEST(pclk * bpp, lane_count);
121 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
168 return DIV_ROUND_CLOSEST(dsi_clock * intel_dsi->lane_count, bpp);
343 int bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format); local
349 return DIV_ROUND_CLOSEST(dsi_clk * intel_dsi->lane_count, bpp);

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