Searched refs:channels (Results 476 - 500 of 1485) sorted by relevance

<<11121314151617181920>>

/linux-master/sound/soc/ti/
H A Ddavinci-mcasp.c115 u32 channels; member in struct:davinci_mcasp
636 * right channels), so it has to be divided by number
708 /* All serializers must have equal number of channels */
855 int period_words, int channels)
870 max_active_serializers = DIV_ROUND_UP(channels, slots);
927 dev_warn(mcasp->dev, "stream has more channels (%d) than are "
928 "enabled in mcasp (%d)\n", channels,
985 int channels)
999 * are channels in the stream.
1003 active_serializers = DIV_ROUND_UP(channels, active_slot
854 mcasp_common_hw_param(struct davinci_mcasp *mcasp, int stream, int period_words, int channels) argument
984 mcasp_i2s_hw_param(struct davinci_mcasp *mcasp, int stream, int channels) argument
1212 int channels = params_channels(params); local
[all...]
/linux-master/sound/pci/lx6464es/
H A Dlx_core.h106 int channels);
163 int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels,
/linux-master/sound/usb/
H A Dproc.c110 snd_iprintf(buffer, " Channels: %d\n", fp->channels);
143 for (c = 0; c < map->channels; c++) {
/linux-master/drivers/dma/
H A Dpch_dma.c121 struct pch_dma_chan channels[MAX_CHAN_NR]; member in struct:pch_dma
708 pd_chan = &pd->channels[i];
749 list_for_each_entry_safe(chan, _c, &pd->dma.channels, device_node) {
772 list_for_each_entry_safe(chan, _c, &pd->dma.channels, device_node) {
869 INIT_LIST_HEAD(&pd->dma.channels);
872 struct pch_dma_chan *pd_chan = &pd->channels[i];
886 list_add_tail(&pd_chan->chan.device_node, &pd->dma.channels);
934 list_for_each_entry_safe(chan, _c, &pd->dma.channels,
H A Dtimb_dma.c91 struct timb_dma_chan channels[]; member in struct:timb_dma
264 struct timb_dma_chan *td_chan = td->channels + i;
506 /* even channels are for RX, odd for TX */
582 struct timb_dma_chan *td_chan = td->channels + i;
638 td = kzalloc(struct_size(td, channels, pdata->nr_channels),
681 INIT_LIST_HEAD(&td->dma.channels);
684 struct timb_dma_chan *td_chan = &td->channels[i];
686 pdata->channels + i;
688 /* even channels are RX, odd are TX */
715 list_add_tail(&td_chan->chan.device_node, &td->dma.channels);
[all...]
/linux-master/drivers/iio/adc/
H A Dad7606_spi.c25 * Range of channels from a group are stored in 2 registers.
27 * For channels from second group(8-15) the order is the same, only with
39 * Range for AD7606B channels are stored in registers starting with address 0x3.
40 * Each register stores range for 2 channels(4 bits per channel).
183 * Ad7616 has 16 channels divided in group A and group B.
184 * The range of channels from A are stored in registers with address 4
185 * while channels from B are stored in register with address 6.
186 * The last bit from channels determines if it is from group A or B
187 * because the order of channels in iio is 0A, 0B, 1A, 1B...
237 indio_dev->channels
[all...]
H A Dingenic-adc.c100 const struct iio_chan_spec *channels; member in struct:ingenic_adc_soc_data
559 .channels = jz4740_channels,
573 .channels = jz4740_channels,
587 .channels = jz4760_channels,
601 .channels = jz4770_channels,
645 /* We cannot sample the aux channels in parallel. */
731 if (iio_dev->channels[i].channel == iiospec->args[0])
894 iio_dev->channels = soc_data->channels;
H A Dad7292.c309 diff_channels = of_property_read_bool(child, "diff-channels");
318 indio_dev->channels = ad7292_channels_diff;
321 indio_dev->channels = ad7292_channels;
H A Dlpc32xx_adc.c191 iodev->channels = lpc32xx_adc_iio_channels;
195 iodev->channels = lpc32xx_adc_iio_scale_channels;
H A Dad7192.c176 const struct iio_chan_spec *channels; member in struct:ad7192_chip_info
461 >> (indio_dev->channels[0].scan_type.realbits -
1024 .channels = ad7192_channels,
1031 .channels = ad7192_channels,
1038 .channels = ad7193_channels,
1045 .channels = ad7192_channels,
1125 indio_dev->channels = st->chip_info->channels;
H A Dad7091r8.c43 .channels = ad7091r##_n##_channels, \
52 .channels = ad7091r##_n##_channels_irq, \
/linux-master/drivers/edac/
H A Di82860_edac.c118 dimm = mci->csrows[row]->channels[0]->dimm;
163 dimm = csrow->channels[0]->dimm;
191 * RDRAM has channels but these don't map onto the csrow abstraction.
192 * According with the datasheet, there are 2 Rambus channels, supporting
/linux-master/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-i2s-audio.c61 switch (hparms->channels) {
106 dw_hdmi_set_channel_count(hdmi, hparms->channels);
/linux-master/drivers/iio/accel/
H A Dfxls8962af-core.c154 const struct iio_chan_spec *channels; member in struct:fxls8962af_chip_info
163 __le16 channels[3]; member in struct:fxls8962af_data::__anon123
757 .channels = fxls8962af_channels,
763 .channels = fxls8962af_channels,
971 memcpy(&data->scan.channels[j++], &buffer[i * 3 + bit],
972 sizeof(data->scan.channels[0]));
1186 indio_dev->channels = data->chip_info->channels;
/linux-master/drivers/iio/humidity/
H A Dhtu21.c211 indio_dev->channels = ms8607_channels;
214 indio_dev->channels = htu21_channels;
/linux-master/sound/isa/gus/
H A Dgus_pcm.c122 begin = pcmp->memory + voice * (pcmp->dma_size / runtime->channels);
123 curr = begin + (pcmp->bpos * pcmp->block_size) / runtime->channels;
124 end = curr + (pcmp->block_size / runtime->channels);
131 pan = runtime->channels == 2 ? (!voice ? 1 : 14) : 8;
214 end = pcmp->memory + (((pcmp->bpos + 1) * pcmp->block_size) / runtime->channels);
216 step = pcmp->dma_size / runtime->channels;
246 if (runtime->channels > 1) {
525 if (substream->runtime->channels > 1)
/linux-master/drivers/iio/amplifiers/
H A Dad8366.c272 indio_dev->channels = ad8366_channels;
284 indio_dev->channels = ada4961_channels;
/linux-master/drivers/power/supply/
H A Dcpcap-battery.c128 struct iio_channel *channels[CPCAP_BATTERY_IIO_NR]; member in struct:cpcap_battery_ddata
186 channel = ddata->channels[CPCAP_BATTERY_IIO_BATTDET];
206 channel = ddata->channels[CPCAP_BATTERY_IIO_VOLTAGE];
222 channel = ddata->channels[CPCAP_BATTERY_IIO_BATT_CURRENT];
993 ddata->channels[i] = devm_iio_channel_get(ddata->dev,
995 if (IS_ERR(ddata->channels[i])) {
996 error = PTR_ERR(ddata->channels[i]);
1000 if (!ddata->channels[i]->indio_dev) {
H A Dcpcap-charger.c132 struct iio_channel *channels[CPCAP_CHARGER_IIO_NR]; member in struct:cpcap_charger_ddata
180 channel = ddata->channels[CPCAP_CHARGER_IIO_VOLTAGE];
196 channel = ddata->channels[CPCAP_CHARGER_IIO_CHRG_CURRENT];
446 ddata->channels[CPCAP_CHARGER_IIO_VBUS];
830 ddata->channels[i] = devm_iio_channel_get(ddata->dev,
832 if (IS_ERR(ddata->channels[i])) {
833 error = PTR_ERR(ddata->channels[i]);
837 if (!ddata->channels[i]->indio_dev) {
/linux-master/sound/soc/qcom/
H A Dlpass-hdmi.c25 unsigned int channels = params_channels(params); local
129 ret = regmap_field_write(meta_ctl->as_sdp_cc, channels - 1);
H A Dlpass-cdc-dma.c221 unsigned int channels = params_channels(params); local
224 switch (channels) {
/linux-master/drivers/dma/sh/
H A Drz-dmac.c100 struct rz_dmac_chan *channels; member in struct:rz_dmac
744 /* Only slave DMA channels can be allocated via DT */
828 ret = of_property_read_u32(np, "dma-channels", &dmac->n_channels);
830 dev_err(dev, "unable to read dma-channels property\n");
835 dev_err(dev, "invalid number of channels %u\n", dmac->n_channels);
863 dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels,
864 sizeof(*dmac->channels), GFP_KERNEL);
865 if (!dmac->channels)
890 /* Initialize the channels. */
891 INIT_LIST_HEAD(&dmac->engine.channels);
[all...]
/linux-master/include/uapi/linux/
H A Dvirtio_snd.h245 /* minimum # of supported channels */
247 /* maximum # of supported channels */
263 /* selected # of channels */
264 __u8 channels; member in struct:virtio_snd_pcm_set_params
342 /* maximum possible number of channels */
351 __u8 channels; member in struct:virtio_snd_chmap_info
/linux-master/drivers/net/wireless/ti/wl1251/
H A Dcmd.h34 struct ieee80211_channel *channels[],
179 /* Number of channels to scan */
218 struct wl1251_scan_ch_parameters channels[SCAN_MAX_NUM_OF_CHANNELS]; member in struct:wl1251_cmd_scan
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/ipoib/
H A Dipoib.c89 mlx5i_build_nic_params(mdev, &priv->channels.params);
430 &priv->channels.params.packet_merge,
431 priv->channels.params.num_channels);
477 &MLX5E_STATS_GRP(channels),
527 new_params = priv->channels.params;
607 err = mlx5e_open_channels(epriv, &epriv->channels);
621 mlx5e_close_channels(&epriv->channels);
651 mlx5e_close_channels(&epriv->channels);

Completed in 420 milliseconds

<<11121314151617181920>>