1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/* -*- linux-c -*- *
3 *
4 * ALSA driver for the digigram lx6464es interface
5 * low-level interface
6 *
7 * Copyright (c) 2009 Tim Blechmann <tim@klingt.org>
8 */
9
10#ifndef LX_CORE_H
11#define LX_CORE_H
12
13#include <linux/interrupt.h>
14
15#include "lx_defs.h"
16
17#define REG_CRM_NUMBER		12
18
19struct lx6464es;
20
21/* low-level register access */
22
23/* dsp register access */
24enum {
25	eReg_BASE,
26	eReg_CSM,
27	eReg_CRM1,
28	eReg_CRM2,
29	eReg_CRM3,
30	eReg_CRM4,
31	eReg_CRM5,
32	eReg_CRM6,
33	eReg_CRM7,
34	eReg_CRM8,
35	eReg_CRM9,
36	eReg_CRM10,
37	eReg_CRM11,
38	eReg_CRM12,
39
40	eReg_ICR,
41	eReg_CVR,
42	eReg_ISR,
43	eReg_RXHTXH,
44	eReg_RXMTXM,
45	eReg_RHLTXL,
46	eReg_RESETDSP,
47
48	eReg_CSUF,
49	eReg_CSES,
50	eReg_CRESMSB,
51	eReg_CRESLSB,
52	eReg_ADMACESMSB,
53	eReg_ADMACESLSB,
54	eReg_CONFES,
55
56	eMaxPortLx
57};
58
59unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port);
60void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data);
61
62/* plx register access */
63enum {
64    ePLX_PCICR,
65
66    ePLX_MBOX0,
67    ePLX_MBOX1,
68    ePLX_MBOX2,
69    ePLX_MBOX3,
70    ePLX_MBOX4,
71    ePLX_MBOX5,
72    ePLX_MBOX6,
73    ePLX_MBOX7,
74
75    ePLX_L2PCIDB,
76    ePLX_IRQCS,
77    ePLX_CHIPSC,
78
79    eMaxPort
80};
81
82unsigned long lx_plx_reg_read(struct lx6464es *chip, int port);
83void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data);
84
85/* rhm */
86struct lx_rmh {
87	u16	cmd_len;	/* length of the command to send (WORDs) */
88	u16	stat_len;	/* length of the status received (WORDs) */
89	u16	dsp_stat;	/* status type, RMP_SSIZE_XXX */
90	u16	cmd_idx;	/* index of the command */
91	u32	cmd[REG_CRM_NUMBER];
92	u32	stat[REG_CRM_NUMBER];
93};
94
95
96/* low-level dsp access */
97int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version);
98int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq);
99int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran);
100int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data);
101int lx_dsp_get_mac(struct lx6464es *chip);
102
103
104/* low-level pipe handling */
105int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture,
106		     int channels);
107int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture);
108int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture,
109			 u64 *rsample_count);
110int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate);
111int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture);
112int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture);
113int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture);
114
115int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture);
116int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture);
117
118/* low-level stream handling */
119int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime,
120			 u32 pipe, int is_capture);
121int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture,
122		    int *rstate);
123int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture,
124			      u64 *r_bytepos);
125
126int lx_stream_set_state(struct lx6464es *chip, u32 pipe,
127			int is_capture, enum stream_state_t state);
128
129static inline int lx_stream_start(struct lx6464es *chip, u32 pipe,
130				  int is_capture)
131{
132	snd_printdd("->lx_stream_start\n");
133	return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN);
134}
135
136static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe,
137				  int is_capture)
138{
139	snd_printdd("->lx_stream_pause\n");
140	return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE);
141}
142
143static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe,
144				 int is_capture)
145{
146	snd_printdd("->lx_stream_stop\n");
147	return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP);
148}
149
150/* low-level buffer handling */
151int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture,
152		  u32 *r_needed, u32 *r_freed, u32 *size_array);
153int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture,
154		   u32 buffer_size, u32 buf_address_lo, u32 buf_address_hi,
155		   u32 *r_buffer_index);
156int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture,
157		   u32 *r_buffer_size);
158int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture,
159		     u32 buffer_index);
160
161/* low-level gain/peak handling */
162int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute);
163int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels,
164		   u32 *r_levels);
165
166
167/* interrupt handling */
168irqreturn_t lx_interrupt(int irq, void *dev_id);
169irqreturn_t lx_threaded_irq(int irq, void *dev_id);
170void lx_irq_enable(struct lx6464es *chip);
171void lx_irq_disable(struct lx6464es *chip);
172
173
174/* Stream Format Header Defines (for LIN and IEEE754) */
175#define HEADER_FMT_BASE		HEADER_FMT_BASE_LIN
176#define HEADER_FMT_BASE_LIN	0xFED00000
177#define HEADER_FMT_BASE_FLOAT	0xFAD00000
178#define HEADER_FMT_MONO		0x00000080 /* bit 23 in header_lo. WARNING: old
179					    * bit 22 is ignored in float
180					    * format */
181#define HEADER_FMT_INTEL	0x00008000
182#define HEADER_FMT_16BITS	0x00002000
183#define HEADER_FMT_24BITS	0x00004000
184#define HEADER_FMT_UPTO11	0x00000200 /* frequency is less or equ. to 11k.
185					    * */
186#define HEADER_FMT_UPTO32	0x00000100 /* frequency is over 11k and less
187					    * then 32k.*/
188
189
190#define BIT_FMP_HEADER          23
191#define BIT_FMP_SD              22
192#define BIT_FMP_MULTICHANNEL    19
193
194#define START_STATE             1
195#define PAUSE_STATE             0
196
197
198
199
200
201/* from PcxAll_e.h */
202/* Start/Pause condition for pipes (PCXStartPipe, PCXPausePipe) */
203#define START_PAUSE_IMMEDIATE           0
204#define START_PAUSE_ON_SYNCHRO          1
205#define START_PAUSE_ON_TIME_CODE        2
206
207
208/* Pipe / Stream state */
209#define START_STATE             1
210#define PAUSE_STATE             0
211
212static inline void unpack_pointer(dma_addr_t ptr, u32 *r_low, u32 *r_high)
213{
214	*r_low = (u32)(ptr & 0xffffffff);
215#if BITS_PER_LONG == 32
216	*r_high = 0;
217#else
218	*r_high = (u32)((u64)ptr>>32);
219#endif
220}
221
222#endif /* LX_CORE_H */
223