Searched refs:readl (Results 351 - 375 of 2370) sorted by relevance

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/linux-master/drivers/pinctrl/
H A Dpinctrl-amd.c46 pin_reg = readl(gpio_dev->base + offset * 4);
62 pin_reg = readl(gpio_dev->base + offset * 4);
78 pin_reg = readl(gpio_dev->base + offset * 4);
97 pin_reg = readl(gpio_dev->base + offset * 4);
110 pin_reg = readl(gpio_dev->base + offset * 4);
128 pin_reg = readl(gpio_dev->base + WAKE_INT_MASTER_REG);
133 pin_reg = readl(gpio_dev->base + offset * 4);
213 seq_printf(s, "WAKE_INT_MASTER_REG: 0x%08x\n", readl(gpio_dev->base + WAKE_INT_MASTER_REG));
244 pin_reg = readl(gpio_dev->base + i * 4);
382 pin_reg = readl(gpio_de
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/linux-master/drivers/input/touchscreen/
H A Dimx6ul_tsc.c113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC);
144 adc_gs = readl(tsc->adc_regs + REG_ADC_GS);
151 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG);
205 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
230 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL);
235 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0);
252 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2);
268 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS);
275 start = readl(ts
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/linux-master/drivers/net/ethernet/freescale/
H A Dfec_ptp.c124 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
128 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
176 val = readl(fep->hwp + FEC_ATIME_CTRL);
181 val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
215 temp_val = readl(fep->hwp + FEC_ATIME_CTRL);
221 ptp_hc = readl(fep->hwp + FEC_ATIME);
243 temp_val = readl(fep->hwp + FEC_ATIME_CTRL);
248 temp_val = readl(fep->hwp + FEC_TCSR(fep->pps_channel));
289 tempval = readl(fep->hwp + FEC_ATIME_CTRL);
296 return readl(fe
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/linux-master/drivers/gpio/
H A Dgpio-mxc.c206 val = readl(port->base + GPIO_EDGE_SEL);
218 val = readl(reg) & ~(0x3 << (bit << 1));
241 val = readl(reg);
288 irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
306 irq_msk = readl(port->base + GPIO_IMR);
310 irq_stat = readl(port->base + GPIO_ISR) & irq_msk;
541 port->gpio_saved_reg.icr1 = readl(port->base + GPIO_ICR1);
542 port->gpio_saved_reg.icr2 = readl(port->base + GPIO_ICR2);
543 port->gpio_saved_reg.imr = readl(por
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H A Dgpio-mlxbf2.c137 arm_gpio_lock_val = readl(yu_arm_gpio_lock_param.io);
243 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CLRCAUSE);
247 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0);
262 val = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_EVTEN0);
276 pending = readl(gs->gpio_io + YU_GPIO_CAUSE_OR_CAUSE_EVTEN0);
313 val = readl(gs->gpio_io + YU_GPIO_CAUSE_FALL_EN);
319 val = readl(gs->gpio_io + YU_GPIO_CAUSE_RISE_EN);
438 gs->csave_regs->gpio_mode0 = readl(gs->gpio_io +
440 gs->csave_regs->gpio_mode1 = readl(gs->gpio_io +
H A Dgpio-graniterapids.c83 dw = readl(addr);
96 dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));
119 dw = readl(gnr_gpio_get_padcfg_addr(priv, gpio));
168 reg = readl(addr);
183 reg = readl(addr);
267 pending = readl(reg + GNR_GPI_STATUS_OFFSET);
268 enabled = readl(reg + GNR_GPI_ENABLE_OFFSET);
312 priv->reg_base = regs + readl(regs + GNR_CFG_BAR);
345 priv->pad_backup[i] = readl(gnr_gpio_get_padcfg_addr(priv, i));
/linux-master/drivers/pinctrl/bcm/
H A Dpinctrl-nsp-gpio.c102 val = readl(base_address + reg);
119 return !!(readl(chip->io_ctrl + reg) & BIT(gpio));
121 return !!(readl(chip->base + reg) & BIT(gpio));
133 int_status = readl(chip->base + NSP_CHIP_A_INT_STATUS);
138 event = readl(chip->base + NSP_GPIO_EVENT_INT_MASK) &
139 readl(chip->base + NSP_GPIO_EVENT);
140 level = readl(chip->base + NSP_GPIO_DATA_IN) ^
141 readl(chip->base + NSP_GPIO_INT_POLARITY);
142 level &= readl(chip->base + NSP_GPIO_INT_MASK);
328 return !!(readl(chi
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/linux-master/drivers/net/dsa/b53/
H A Db53_srab.c98 ctrls = readl(regs + B53_SRAB_CTRLS);
103 ctrls = readl(regs + B53_SRAB_CTRLS);
120 ctrls = readl(regs + B53_SRAB_CTRLS);
141 cmdstat = readl(regs + B53_SRAB_CMDSTAT);
167 *val = readl(regs + B53_SRAB_RD_L) & 0xff;
189 *val = readl(regs + B53_SRAB_RD_L) & 0xffff;
211 *val = readl(regs + B53_SRAB_RD_L);
233 *val = readl(regs + B53_SRAB_RD_L);
234 *val += ((u64)readl(regs + B53_SRAB_RD_H) & 0xffff) << 32;
256 *val = readl(reg
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/linux-master/drivers/net/ethernet/ti/
H A Ddavinci_mdio.c151 reg = readl(&data->regs->control);
164 reg = readl(&data->regs->poll);
175 reg = readl(&data->regs->manualif);
191 reg = readl(&data->regs->manualif);
207 reg = readl(&data->regs->manualif);
223 reg = readl(&data->regs->manualif);
312 ver = readl(&data->regs->version);
322 phy_mask = readl(&data->regs->alive);
366 reg = readl(&regs->user[0].access);
370 reg = readl(
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H A Dnetcp_xgbepcsr.c22 writel(((readl(addr) & (~(mask))) | \
212 val_0 = (readl(sw_regs + XGBE_SGMII_1_OFFSET) & BIT(4));
213 val_1 = (readl(sw_regs + XGBE_SGMII_2_OFFSET) & BIT(4));
240 tmp = (readl(serdes_regs + 0x0ec) >> 24) & 0x0ff;
241 tmp |= ((readl(serdes_regs + 0x0fc) >> 16) & 0x00f00);
243 tmp = (readl(serdes_regs + 0x0f8) >> 16) & 0x0fff;
318 loss = readl(serdes_regs + 0x1fc0 + 0x20 + (i * 0x04)) & 0x1;
321 pcsr_rx_stat = readl(pcsr_base + 0x0c + (i * 0x80));
488 val = readl(serdes_regs + 0xa00);
/linux-master/drivers/i2c/busses/
H A Di2c-sprd.c100 u32 tmp = readl(i2c_dev->base + I2C_CTL);
110 u32 tmp = readl(i2c_dev->base + I2C_CTL);
117 u32 tmp = readl(i2c_dev->base + I2C_STATUS);
124 u32 tmp = readl(i2c_dev->base + I2C_STATUS);
157 u32 tmp = readl(i2c_dev->base + I2C_CTL);
166 u32 tmp = readl(i2c_dev->base + I2C_CTL);
175 u32 tmp = readl(i2c_dev->base + I2C_CTL);
187 u32 tmp = readl(i2c_dev->base + I2C_CTL);
199 u32 tmp = readl(i2c_dev->base + I2C_CTL);
206 u32 cmd = readl(i2c_de
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H A Di2c-imx-lpi2c.c124 temp = readl(lpi2c_imx->base + LPI2C_MSR);
171 temp = readl(lpi2c_imx->base + LPI2C_MCR);
190 temp = readl(lpi2c_imx->base + LPI2C_MSR);
282 temp = readl(lpi2c_imx->base + LPI2C_MCR);
299 temp = readl(lpi2c_imx->base + LPI2C_MCR);
324 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
326 if (readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) {
367 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff;
390 data = readl(lpi2c_imx->base + LPI2C_MRDR);
500 temp = readl(lpi2c_im
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/linux-master/drivers/spi/
H A Dspi-cadence-xspi.c257 u32 cmd_status = readl(cdns_xspi->iobase + CDNS_XSPI_CMD_STATUS_REG);
295 intr_enable = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_ENABLE_REG);
309 ctrl_ver = readl(cdns_xspi->iobase + CDNS_XSPI_CTRL_VERSION_REG);
318 ctrl_features = readl(cdns_xspi->iobase + CDNS_XSPI_CTRL_FEATURES_REG);
330 sdma_size = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_SIZE_REG);
331 sdma_trd_info = readl(cdns_xspi->iobase + CDNS_XSPI_SDMA_TRD_INFO_REG);
451 irq_status = readl(cdns_xspi->iobase + CDNS_XSPI_INTR_STATUS_REG);
473 irq_status = readl(cdns_xspi->iobase + CDNS_XSPI_TRD_COMP_INTR_STATUS);
510 readl(cdns_xspi->iobase + CDNS_XSPI_DLL_PHY_CTRL));
512 readl(cdns_xsp
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/linux-master/arch/m68k/coldfire/
H A Dm53xx.c372 if (!(readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)) {
429 writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IPALL, MCF_SDRAMC_SDCR);
434 writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
435 writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_IREF, MCF_SDRAMC_SDCR);
448 writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_MODE_EN,
505 if (readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)
507 writel(readl(MCF_SDRAMC_SDCR) & ~MCF_SDRAMC_SDCR_CKE,
530 if (readl(MCF_SDRAMC_SDCR) & MCF_SDRAMC_SDCR_REF)
532 writel(readl(MCF_SDRAMC_SDCR) | MCF_SDRAMC_SDCR_CKE,
/linux-master/drivers/clk/ingenic/
H A Dx1000-cgu.c70 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
124 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1);
138 writel(readl(reg_opcr) | OPCR_SPENDN0, reg_opcr);
139 writel(readl(reg_usbpcr) & ~USBPCR_OTG_DISABLE & ~USBPCR_SIDDQ, reg_usbpcr);
148 writel(readl(reg_opcr) & ~OPCR_SPENDN0, reg_opcr);
149 writel(readl(reg_usbpcr) | USBPCR_OTG_DISABLE | USBPCR_SIDDQ, reg_usbpcr);
157 return (readl(reg_opcr) & OPCR_SPENDN0) &&
158 !(readl(reg_usbpcr) & USBPCR_SIDDQ) &&
159 !(readl(reg_usbpcr) & USBPCR_OTG_DISABLE);
/linux-master/drivers/char/agp/
H A Damd-k7-agp.c50 readl(page_map->remapped+i); /* PCI Posting. */
160 readl(page_dir.remapped+GET_PAGE_DIR_OFF(addr)); /* PCI Posting. */
167 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
226 readl(amd_irongate_private.registers+AMD_ATTBASE); /* PCI Posting. */
247 readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting.*/
282 readl(amd_irongate_private.registers+AMD_TLBFLUSH); /* PCI Posting. */
304 if (!PGE_EMPTY(agp_bridge, readl(cur_gatt+GET_GATT_OFF(addr))))
321 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
341 readl(cur_gatt+GET_GATT_OFF(addr)); /* PCI Posting. */
/linux-master/drivers/misc/
H A Dtifm_7xx1.c43 irq_status = readl(fm->addr + FM_INTERRUPT_STATUS);
87 & readl(sock_addr + SOCK_PRESENT_STATE)))
93 s_state = readl(sock_addr + SOCK_PRESENT_STATE);
97 writel(readl(sock_addr + SOCK_CONTROL) | TIFM_CTRL_LED,
101 if (((readl(sock_addr + SOCK_PRESENT_STATE) >> 4) & 7)
111 & readl(sock_addr + SOCK_PRESENT_STATE)))
117 writel(readl(sock_addr + SOCK_CONTROL) & (~TIFM_CTRL_LED),
120 return (readl(sock_addr + SOCK_PRESENT_STATE) >> 4) & 7;
125 writel((~TIFM_CTRL_POWER_MASK) & readl(sock_addr + SOCK_CONTROL),
/linux-master/drivers/phy/ingenic/
H A Dphy-ingenic-usb.c115 reg = readl(priv->base + REG_USBPCR_OFFSET);
163 reg = readl(priv->base + REG_USBPCR_OFFSET);
172 reg = readl(priv->base + REG_USBPCR_OFFSET);
181 reg = readl(priv->base + REG_USBPCR_OFFSET);
226 reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_USB_SEL |
240 reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_USB_SEL |
253 reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT;
271 reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_WORD_IF_16BIT |
285 reg = readl(priv->base + REG_USBPCR1_OFFSET) | USBPCR1_DPPD | USBPCR1_DMPD;
/linux-master/drivers/reset/
H A Dreset-npcm.c122 stat = readl(rc->base + ctrl_offset);
150 return (readl(rc->base + ctrl_offset) & rst_bit);
215 iprst1 = readl(rc->base + NPCM_IPSRST1);
216 iprst2 = readl(rc->base + NPCM_IPSRST2);
217 iprst3 = readl(rc->base + NPCM_IPSRST3);
285 iprst1 = readl(rc->base + NPCM_IPSRST1);
286 iprst2 = readl(rc->base + NPCM_IPSRST2);
287 iprst3 = readl(rc->base + NPCM_IPSRST3);
288 iprst4 = readl(rc->base + NPCM_IPSRST4);
/linux-master/drivers/pinctrl/intel/
H A Dpinctrl-intel.c186 return !(readl(padown) & PADOWN_MASK(gpp_offset));
210 return !(readl(hostown) & BIT(gpp_offset));
258 value = readl(community->regs + offset);
263 value = readl(community->regs + offset);
321 cfg0 = readl(intel_get_padcfg(pctrl, pin, PADCFG0));
322 cfg1 = readl(intel_get_padcfg(pctrl, pin, PADCFG1));
335 seq_printf(s, " 0x%08x", readl(padcfg));
417 value = readl(padcfg0);
436 value = readl(padcfg0);
454 return __intel_gpio_get_gpio_mode(readl(padcfg
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/linux-master/drivers/video/fbdev/geode/
H A Ddisplay_gx1.c62 bank_cfg = readl(mc_regs + MC_BANK_CFG);
70 fb_base = (readl(mc_regs + MC_GBASE_ADD) & MC_GADD_GBADD_MASK) << 19;
85 readl(par->dc_regs + DC_UNLOCK);
88 gcfg = readl(par->dc_regs + DC_GENERAL_CFG);
89 tcfg = readl(par->dc_regs + DC_TIMING_CFG);
/linux-master/drivers/mtd/nand/raw/ingenic/
H A Djz4780_bch.c68 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
85 writel(readl(bch->base + BCH_BHINT), bch->base + BCH_BHINT);
117 *dest32++ = readl(bch->base + BCH_BHPAR0 + offset);
122 val = readl(bch->base + BCH_BHPAR0 + offset);
214 reg = readl(bch->base + BCH_BHERR0 + (i * 4));
/linux-master/drivers/clk/socfpga/
H A Dclk-periph-s10.c26 val = readl(socfpgaclk->hw.reg);
40 val = readl(socfpgaclk->hw.reg);
57 div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1);
72 parent = ((readl(socfpgaclk->bypass_reg) & mask) >>
79 clk_src = readl(socfpgaclk->hw.reg);
/linux-master/drivers/clocksource/
H A Dtimer-armada-370-xp.c90 writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set,
96 return ~readl(timer_base + TIMER0_VAL_OFF);
213 timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF);
214 timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF);
233 return ~readl(timer_base + TIMER0_VAL_OFF);
/linux-master/drivers/net/ethernet/mellanox/mlx4/
H A Dcrdump.c65 readl(cr_space + CR_ENABLE_BIT_OFFSET) & CR_ENABLE_BIT;
69 writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) & ~CR_ENABLE_BIT,
86 writel(readl(cr_space + CR_ENABLE_BIT_OFFSET) | CR_ENABLE_BIT,
112 readl(cr_space + offset);
151 readl(health_buf_start + offset);

Completed in 287 milliseconds

<<11121314151617181920>>