1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * This is i.MX low power i2c controller driver. 4 * 5 * Copyright 2016 Freescale Semiconductor, Inc. 6 */ 7 8#include <linux/clk.h> 9#include <linux/completion.h> 10#include <linux/delay.h> 11#include <linux/err.h> 12#include <linux/errno.h> 13#include <linux/i2c.h> 14#include <linux/init.h> 15#include <linux/interrupt.h> 16#include <linux/io.h> 17#include <linux/kernel.h> 18#include <linux/module.h> 19#include <linux/of.h> 20#include <linux/pinctrl/consumer.h> 21#include <linux/platform_device.h> 22#include <linux/pm_runtime.h> 23#include <linux/sched.h> 24#include <linux/slab.h> 25 26#define DRIVER_NAME "imx-lpi2c" 27 28#define LPI2C_PARAM 0x04 /* i2c RX/TX FIFO size */ 29#define LPI2C_MCR 0x10 /* i2c contrl register */ 30#define LPI2C_MSR 0x14 /* i2c status register */ 31#define LPI2C_MIER 0x18 /* i2c interrupt enable */ 32#define LPI2C_MCFGR0 0x20 /* i2c master configuration */ 33#define LPI2C_MCFGR1 0x24 /* i2c master configuration */ 34#define LPI2C_MCFGR2 0x28 /* i2c master configuration */ 35#define LPI2C_MCFGR3 0x2C /* i2c master configuration */ 36#define LPI2C_MCCR0 0x48 /* i2c master clk configuration */ 37#define LPI2C_MCCR1 0x50 /* i2c master clk configuration */ 38#define LPI2C_MFCR 0x58 /* i2c master FIFO control */ 39#define LPI2C_MFSR 0x5C /* i2c master FIFO status */ 40#define LPI2C_MTDR 0x60 /* i2c master TX data register */ 41#define LPI2C_MRDR 0x70 /* i2c master RX data register */ 42 43/* i2c command */ 44#define TRAN_DATA 0X00 45#define RECV_DATA 0X01 46#define GEN_STOP 0X02 47#define RECV_DISCARD 0X03 48#define GEN_START 0X04 49#define START_NACK 0X05 50#define START_HIGH 0X06 51#define START_HIGH_NACK 0X07 52 53#define MCR_MEN BIT(0) 54#define MCR_RST BIT(1) 55#define MCR_DOZEN BIT(2) 56#define MCR_DBGEN BIT(3) 57#define MCR_RTF BIT(8) 58#define MCR_RRF BIT(9) 59#define MSR_TDF BIT(0) 60#define MSR_RDF BIT(1) 61#define MSR_SDF BIT(9) 62#define MSR_NDF BIT(10) 63#define MSR_ALF BIT(11) 64#define MSR_MBF BIT(24) 65#define MSR_BBF BIT(25) 66#define MIER_TDIE BIT(0) 67#define MIER_RDIE BIT(1) 68#define MIER_SDIE BIT(9) 69#define MIER_NDIE BIT(10) 70#define MCFGR1_AUTOSTOP BIT(8) 71#define MCFGR1_IGNACK BIT(9) 72#define MRDR_RXEMPTY BIT(14) 73 74#define I2C_CLK_RATIO 2 75#define CHUNK_DATA 256 76 77#define I2C_PM_TIMEOUT 10 /* ms */ 78 79enum lpi2c_imx_mode { 80 STANDARD, /* 100+Kbps */ 81 FAST, /* 400+Kbps */ 82 FAST_PLUS, /* 1.0+Mbps */ 83 HS, /* 3.4+Mbps */ 84 ULTRA_FAST, /* 5.0+Mbps */ 85}; 86 87enum lpi2c_imx_pincfg { 88 TWO_PIN_OD, 89 TWO_PIN_OO, 90 TWO_PIN_PP, 91 FOUR_PIN_PP, 92}; 93 94struct lpi2c_imx_struct { 95 struct i2c_adapter adapter; 96 int num_clks; 97 struct clk_bulk_data *clks; 98 void __iomem *base; 99 __u8 *rx_buf; 100 __u8 *tx_buf; 101 struct completion complete; 102 unsigned int msglen; 103 unsigned int delivered; 104 unsigned int block_data; 105 unsigned int bitrate; 106 unsigned int txfifosize; 107 unsigned int rxfifosize; 108 enum lpi2c_imx_mode mode; 109 struct i2c_bus_recovery_info rinfo; 110}; 111 112static void lpi2c_imx_intctrl(struct lpi2c_imx_struct *lpi2c_imx, 113 unsigned int enable) 114{ 115 writel(enable, lpi2c_imx->base + LPI2C_MIER); 116} 117 118static int lpi2c_imx_bus_busy(struct lpi2c_imx_struct *lpi2c_imx) 119{ 120 unsigned long orig_jiffies = jiffies; 121 unsigned int temp; 122 123 while (1) { 124 temp = readl(lpi2c_imx->base + LPI2C_MSR); 125 126 /* check for arbitration lost, clear if set */ 127 if (temp & MSR_ALF) { 128 writel(temp, lpi2c_imx->base + LPI2C_MSR); 129 return -EAGAIN; 130 } 131 132 if (temp & (MSR_BBF | MSR_MBF)) 133 break; 134 135 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 136 dev_dbg(&lpi2c_imx->adapter.dev, "bus not work\n"); 137 if (lpi2c_imx->adapter.bus_recovery_info) 138 i2c_recover_bus(&lpi2c_imx->adapter); 139 return -ETIMEDOUT; 140 } 141 schedule(); 142 } 143 144 return 0; 145} 146 147static void lpi2c_imx_set_mode(struct lpi2c_imx_struct *lpi2c_imx) 148{ 149 unsigned int bitrate = lpi2c_imx->bitrate; 150 enum lpi2c_imx_mode mode; 151 152 if (bitrate < I2C_MAX_FAST_MODE_FREQ) 153 mode = STANDARD; 154 else if (bitrate < I2C_MAX_FAST_MODE_PLUS_FREQ) 155 mode = FAST; 156 else if (bitrate < I2C_MAX_HIGH_SPEED_MODE_FREQ) 157 mode = FAST_PLUS; 158 else if (bitrate < I2C_MAX_ULTRA_FAST_MODE_FREQ) 159 mode = HS; 160 else 161 mode = ULTRA_FAST; 162 163 lpi2c_imx->mode = mode; 164} 165 166static int lpi2c_imx_start(struct lpi2c_imx_struct *lpi2c_imx, 167 struct i2c_msg *msgs) 168{ 169 unsigned int temp; 170 171 temp = readl(lpi2c_imx->base + LPI2C_MCR); 172 temp |= MCR_RRF | MCR_RTF; 173 writel(temp, lpi2c_imx->base + LPI2C_MCR); 174 writel(0x7f00, lpi2c_imx->base + LPI2C_MSR); 175 176 temp = i2c_8bit_addr_from_msg(msgs) | (GEN_START << 8); 177 writel(temp, lpi2c_imx->base + LPI2C_MTDR); 178 179 return lpi2c_imx_bus_busy(lpi2c_imx); 180} 181 182static void lpi2c_imx_stop(struct lpi2c_imx_struct *lpi2c_imx) 183{ 184 unsigned long orig_jiffies = jiffies; 185 unsigned int temp; 186 187 writel(GEN_STOP << 8, lpi2c_imx->base + LPI2C_MTDR); 188 189 do { 190 temp = readl(lpi2c_imx->base + LPI2C_MSR); 191 if (temp & MSR_SDF) 192 break; 193 194 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 195 dev_dbg(&lpi2c_imx->adapter.dev, "stop timeout\n"); 196 if (lpi2c_imx->adapter.bus_recovery_info) 197 i2c_recover_bus(&lpi2c_imx->adapter); 198 break; 199 } 200 schedule(); 201 202 } while (1); 203} 204 205/* CLKLO = I2C_CLK_RATIO * CLKHI, SETHOLD = CLKHI, DATAVD = CLKHI/2 */ 206static int lpi2c_imx_config(struct lpi2c_imx_struct *lpi2c_imx) 207{ 208 u8 prescale, filt, sethold, datavd; 209 unsigned int clk_rate, clk_cycle, clkhi, clklo; 210 enum lpi2c_imx_pincfg pincfg; 211 unsigned int temp; 212 213 lpi2c_imx_set_mode(lpi2c_imx); 214 215 clk_rate = clk_get_rate(lpi2c_imx->clks[0].clk); 216 if (!clk_rate) 217 return -EINVAL; 218 219 if (lpi2c_imx->mode == HS || lpi2c_imx->mode == ULTRA_FAST) 220 filt = 0; 221 else 222 filt = 2; 223 224 for (prescale = 0; prescale <= 7; prescale++) { 225 clk_cycle = clk_rate / ((1 << prescale) * lpi2c_imx->bitrate) 226 - 3 - (filt >> 1); 227 clkhi = DIV_ROUND_UP(clk_cycle, I2C_CLK_RATIO + 1); 228 clklo = clk_cycle - clkhi; 229 if (clklo < 64) 230 break; 231 } 232 233 if (prescale > 7) 234 return -EINVAL; 235 236 /* set MCFGR1: PINCFG, PRESCALE, IGNACK */ 237 if (lpi2c_imx->mode == ULTRA_FAST) 238 pincfg = TWO_PIN_OO; 239 else 240 pincfg = TWO_PIN_OD; 241 temp = prescale | pincfg << 24; 242 243 if (lpi2c_imx->mode == ULTRA_FAST) 244 temp |= MCFGR1_IGNACK; 245 246 writel(temp, lpi2c_imx->base + LPI2C_MCFGR1); 247 248 /* set MCFGR2: FILTSDA, FILTSCL */ 249 temp = (filt << 16) | (filt << 24); 250 writel(temp, lpi2c_imx->base + LPI2C_MCFGR2); 251 252 /* set MCCR: DATAVD, SETHOLD, CLKHI, CLKLO */ 253 sethold = clkhi; 254 datavd = clkhi >> 1; 255 temp = datavd << 24 | sethold << 16 | clkhi << 8 | clklo; 256 257 if (lpi2c_imx->mode == HS) 258 writel(temp, lpi2c_imx->base + LPI2C_MCCR1); 259 else 260 writel(temp, lpi2c_imx->base + LPI2C_MCCR0); 261 262 return 0; 263} 264 265static int lpi2c_imx_master_enable(struct lpi2c_imx_struct *lpi2c_imx) 266{ 267 unsigned int temp; 268 int ret; 269 270 ret = pm_runtime_resume_and_get(lpi2c_imx->adapter.dev.parent); 271 if (ret < 0) 272 return ret; 273 274 temp = MCR_RST; 275 writel(temp, lpi2c_imx->base + LPI2C_MCR); 276 writel(0, lpi2c_imx->base + LPI2C_MCR); 277 278 ret = lpi2c_imx_config(lpi2c_imx); 279 if (ret) 280 goto rpm_put; 281 282 temp = readl(lpi2c_imx->base + LPI2C_MCR); 283 temp |= MCR_MEN; 284 writel(temp, lpi2c_imx->base + LPI2C_MCR); 285 286 return 0; 287 288rpm_put: 289 pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent); 290 pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent); 291 292 return ret; 293} 294 295static int lpi2c_imx_master_disable(struct lpi2c_imx_struct *lpi2c_imx) 296{ 297 u32 temp; 298 299 temp = readl(lpi2c_imx->base + LPI2C_MCR); 300 temp &= ~MCR_MEN; 301 writel(temp, lpi2c_imx->base + LPI2C_MCR); 302 303 pm_runtime_mark_last_busy(lpi2c_imx->adapter.dev.parent); 304 pm_runtime_put_autosuspend(lpi2c_imx->adapter.dev.parent); 305 306 return 0; 307} 308 309static int lpi2c_imx_msg_complete(struct lpi2c_imx_struct *lpi2c_imx) 310{ 311 unsigned long timeout; 312 313 timeout = wait_for_completion_timeout(&lpi2c_imx->complete, HZ); 314 315 return timeout ? 0 : -ETIMEDOUT; 316} 317 318static int lpi2c_imx_txfifo_empty(struct lpi2c_imx_struct *lpi2c_imx) 319{ 320 unsigned long orig_jiffies = jiffies; 321 u32 txcnt; 322 323 do { 324 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff; 325 326 if (readl(lpi2c_imx->base + LPI2C_MSR) & MSR_NDF) { 327 dev_dbg(&lpi2c_imx->adapter.dev, "NDF detected\n"); 328 return -EIO; 329 } 330 331 if (time_after(jiffies, orig_jiffies + msecs_to_jiffies(500))) { 332 dev_dbg(&lpi2c_imx->adapter.dev, "txfifo empty timeout\n"); 333 if (lpi2c_imx->adapter.bus_recovery_info) 334 i2c_recover_bus(&lpi2c_imx->adapter); 335 return -ETIMEDOUT; 336 } 337 schedule(); 338 339 } while (txcnt); 340 341 return 0; 342} 343 344static void lpi2c_imx_set_tx_watermark(struct lpi2c_imx_struct *lpi2c_imx) 345{ 346 writel(lpi2c_imx->txfifosize >> 1, lpi2c_imx->base + LPI2C_MFCR); 347} 348 349static void lpi2c_imx_set_rx_watermark(struct lpi2c_imx_struct *lpi2c_imx) 350{ 351 unsigned int temp, remaining; 352 353 remaining = lpi2c_imx->msglen - lpi2c_imx->delivered; 354 355 if (remaining > (lpi2c_imx->rxfifosize >> 1)) 356 temp = lpi2c_imx->rxfifosize >> 1; 357 else 358 temp = 0; 359 360 writel(temp << 16, lpi2c_imx->base + LPI2C_MFCR); 361} 362 363static void lpi2c_imx_write_txfifo(struct lpi2c_imx_struct *lpi2c_imx) 364{ 365 unsigned int data, txcnt; 366 367 txcnt = readl(lpi2c_imx->base + LPI2C_MFSR) & 0xff; 368 369 while (txcnt < lpi2c_imx->txfifosize) { 370 if (lpi2c_imx->delivered == lpi2c_imx->msglen) 371 break; 372 373 data = lpi2c_imx->tx_buf[lpi2c_imx->delivered++]; 374 writel(data, lpi2c_imx->base + LPI2C_MTDR); 375 txcnt++; 376 } 377 378 if (lpi2c_imx->delivered < lpi2c_imx->msglen) 379 lpi2c_imx_intctrl(lpi2c_imx, MIER_TDIE | MIER_NDIE); 380 else 381 complete(&lpi2c_imx->complete); 382} 383 384static void lpi2c_imx_read_rxfifo(struct lpi2c_imx_struct *lpi2c_imx) 385{ 386 unsigned int blocklen, remaining; 387 unsigned int temp, data; 388 389 do { 390 data = readl(lpi2c_imx->base + LPI2C_MRDR); 391 if (data & MRDR_RXEMPTY) 392 break; 393 394 lpi2c_imx->rx_buf[lpi2c_imx->delivered++] = data & 0xff; 395 } while (1); 396 397 /* 398 * First byte is the length of remaining packet in the SMBus block 399 * data read. Add it to msgs->len. 400 */ 401 if (lpi2c_imx->block_data) { 402 blocklen = lpi2c_imx->rx_buf[0]; 403 lpi2c_imx->msglen += blocklen; 404 } 405 406 remaining = lpi2c_imx->msglen - lpi2c_imx->delivered; 407 408 if (!remaining) { 409 complete(&lpi2c_imx->complete); 410 return; 411 } 412 413 /* not finished, still waiting for rx data */ 414 lpi2c_imx_set_rx_watermark(lpi2c_imx); 415 416 /* multiple receive commands */ 417 if (lpi2c_imx->block_data) { 418 lpi2c_imx->block_data = 0; 419 temp = remaining; 420 temp |= (RECV_DATA << 8); 421 writel(temp, lpi2c_imx->base + LPI2C_MTDR); 422 } else if (!(lpi2c_imx->delivered & 0xff)) { 423 temp = (remaining > CHUNK_DATA ? CHUNK_DATA : remaining) - 1; 424 temp |= (RECV_DATA << 8); 425 writel(temp, lpi2c_imx->base + LPI2C_MTDR); 426 } 427 428 lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE); 429} 430 431static void lpi2c_imx_write(struct lpi2c_imx_struct *lpi2c_imx, 432 struct i2c_msg *msgs) 433{ 434 lpi2c_imx->tx_buf = msgs->buf; 435 lpi2c_imx_set_tx_watermark(lpi2c_imx); 436 lpi2c_imx_write_txfifo(lpi2c_imx); 437} 438 439static void lpi2c_imx_read(struct lpi2c_imx_struct *lpi2c_imx, 440 struct i2c_msg *msgs) 441{ 442 unsigned int temp; 443 444 lpi2c_imx->rx_buf = msgs->buf; 445 lpi2c_imx->block_data = msgs->flags & I2C_M_RECV_LEN; 446 447 lpi2c_imx_set_rx_watermark(lpi2c_imx); 448 temp = msgs->len > CHUNK_DATA ? CHUNK_DATA - 1 : msgs->len - 1; 449 temp |= (RECV_DATA << 8); 450 writel(temp, lpi2c_imx->base + LPI2C_MTDR); 451 452 lpi2c_imx_intctrl(lpi2c_imx, MIER_RDIE | MIER_NDIE); 453} 454 455static int lpi2c_imx_xfer(struct i2c_adapter *adapter, 456 struct i2c_msg *msgs, int num) 457{ 458 struct lpi2c_imx_struct *lpi2c_imx = i2c_get_adapdata(adapter); 459 unsigned int temp; 460 int i, result; 461 462 result = lpi2c_imx_master_enable(lpi2c_imx); 463 if (result) 464 return result; 465 466 for (i = 0; i < num; i++) { 467 result = lpi2c_imx_start(lpi2c_imx, &msgs[i]); 468 if (result) 469 goto disable; 470 471 /* quick smbus */ 472 if (num == 1 && msgs[0].len == 0) 473 goto stop; 474 475 lpi2c_imx->rx_buf = NULL; 476 lpi2c_imx->tx_buf = NULL; 477 lpi2c_imx->delivered = 0; 478 lpi2c_imx->msglen = msgs[i].len; 479 init_completion(&lpi2c_imx->complete); 480 481 if (msgs[i].flags & I2C_M_RD) 482 lpi2c_imx_read(lpi2c_imx, &msgs[i]); 483 else 484 lpi2c_imx_write(lpi2c_imx, &msgs[i]); 485 486 result = lpi2c_imx_msg_complete(lpi2c_imx); 487 if (result) 488 goto stop; 489 490 if (!(msgs[i].flags & I2C_M_RD)) { 491 result = lpi2c_imx_txfifo_empty(lpi2c_imx); 492 if (result) 493 goto stop; 494 } 495 } 496 497stop: 498 lpi2c_imx_stop(lpi2c_imx); 499 500 temp = readl(lpi2c_imx->base + LPI2C_MSR); 501 if ((temp & MSR_NDF) && !result) 502 result = -EIO; 503 504disable: 505 lpi2c_imx_master_disable(lpi2c_imx); 506 507 dev_dbg(&lpi2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__, 508 (result < 0) ? "error" : "success msg", 509 (result < 0) ? result : num); 510 511 return (result < 0) ? result : num; 512} 513 514static irqreturn_t lpi2c_imx_isr(int irq, void *dev_id) 515{ 516 struct lpi2c_imx_struct *lpi2c_imx = dev_id; 517 unsigned int enabled; 518 unsigned int temp; 519 520 enabled = readl(lpi2c_imx->base + LPI2C_MIER); 521 522 lpi2c_imx_intctrl(lpi2c_imx, 0); 523 temp = readl(lpi2c_imx->base + LPI2C_MSR); 524 temp &= enabled; 525 526 if (temp & MSR_NDF) 527 complete(&lpi2c_imx->complete); 528 else if (temp & MSR_RDF) 529 lpi2c_imx_read_rxfifo(lpi2c_imx); 530 else if (temp & MSR_TDF) 531 lpi2c_imx_write_txfifo(lpi2c_imx); 532 533 return IRQ_HANDLED; 534} 535 536static int lpi2c_imx_init_recovery_info(struct lpi2c_imx_struct *lpi2c_imx, 537 struct platform_device *pdev) 538{ 539 struct i2c_bus_recovery_info *bri = &lpi2c_imx->rinfo; 540 541 bri->pinctrl = devm_pinctrl_get(&pdev->dev); 542 if (IS_ERR(bri->pinctrl)) 543 return PTR_ERR(bri->pinctrl); 544 545 lpi2c_imx->adapter.bus_recovery_info = bri; 546 547 return 0; 548} 549 550static u32 lpi2c_imx_func(struct i2c_adapter *adapter) 551{ 552 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | 553 I2C_FUNC_SMBUS_READ_BLOCK_DATA; 554} 555 556static const struct i2c_algorithm lpi2c_imx_algo = { 557 .master_xfer = lpi2c_imx_xfer, 558 .functionality = lpi2c_imx_func, 559}; 560 561static const struct of_device_id lpi2c_imx_of_match[] = { 562 { .compatible = "fsl,imx7ulp-lpi2c" }, 563 { }, 564}; 565MODULE_DEVICE_TABLE(of, lpi2c_imx_of_match); 566 567static int lpi2c_imx_probe(struct platform_device *pdev) 568{ 569 struct lpi2c_imx_struct *lpi2c_imx; 570 unsigned int temp; 571 int irq, ret; 572 573 lpi2c_imx = devm_kzalloc(&pdev->dev, sizeof(*lpi2c_imx), GFP_KERNEL); 574 if (!lpi2c_imx) 575 return -ENOMEM; 576 577 lpi2c_imx->base = devm_platform_ioremap_resource(pdev, 0); 578 if (IS_ERR(lpi2c_imx->base)) 579 return PTR_ERR(lpi2c_imx->base); 580 581 irq = platform_get_irq(pdev, 0); 582 if (irq < 0) 583 return irq; 584 585 lpi2c_imx->adapter.owner = THIS_MODULE; 586 lpi2c_imx->adapter.algo = &lpi2c_imx_algo; 587 lpi2c_imx->adapter.dev.parent = &pdev->dev; 588 lpi2c_imx->adapter.dev.of_node = pdev->dev.of_node; 589 strscpy(lpi2c_imx->adapter.name, pdev->name, 590 sizeof(lpi2c_imx->adapter.name)); 591 592 ret = devm_clk_bulk_get_all(&pdev->dev, &lpi2c_imx->clks); 593 if (ret < 0) 594 return dev_err_probe(&pdev->dev, ret, "can't get I2C peripheral clock\n"); 595 lpi2c_imx->num_clks = ret; 596 597 ret = of_property_read_u32(pdev->dev.of_node, 598 "clock-frequency", &lpi2c_imx->bitrate); 599 if (ret) 600 lpi2c_imx->bitrate = I2C_MAX_STANDARD_MODE_FREQ; 601 602 ret = devm_request_irq(&pdev->dev, irq, lpi2c_imx_isr, 0, 603 pdev->name, lpi2c_imx); 604 if (ret) 605 return dev_err_probe(&pdev->dev, ret, "can't claim irq %d\n", irq); 606 607 i2c_set_adapdata(&lpi2c_imx->adapter, lpi2c_imx); 608 platform_set_drvdata(pdev, lpi2c_imx); 609 610 ret = clk_bulk_prepare_enable(lpi2c_imx->num_clks, lpi2c_imx->clks); 611 if (ret) 612 return ret; 613 614 pm_runtime_set_autosuspend_delay(&pdev->dev, I2C_PM_TIMEOUT); 615 pm_runtime_use_autosuspend(&pdev->dev); 616 pm_runtime_get_noresume(&pdev->dev); 617 pm_runtime_set_active(&pdev->dev); 618 pm_runtime_enable(&pdev->dev); 619 620 temp = readl(lpi2c_imx->base + LPI2C_PARAM); 621 lpi2c_imx->txfifosize = 1 << (temp & 0x0f); 622 lpi2c_imx->rxfifosize = 1 << ((temp >> 8) & 0x0f); 623 624 /* Init optional bus recovery function */ 625 ret = lpi2c_imx_init_recovery_info(lpi2c_imx, pdev); 626 /* Give it another chance if pinctrl used is not ready yet */ 627 if (ret == -EPROBE_DEFER) 628 goto rpm_disable; 629 630 ret = i2c_add_adapter(&lpi2c_imx->adapter); 631 if (ret) 632 goto rpm_disable; 633 634 pm_runtime_mark_last_busy(&pdev->dev); 635 pm_runtime_put_autosuspend(&pdev->dev); 636 637 dev_info(&lpi2c_imx->adapter.dev, "LPI2C adapter registered\n"); 638 639 return 0; 640 641rpm_disable: 642 pm_runtime_put(&pdev->dev); 643 pm_runtime_disable(&pdev->dev); 644 pm_runtime_dont_use_autosuspend(&pdev->dev); 645 646 return ret; 647} 648 649static void lpi2c_imx_remove(struct platform_device *pdev) 650{ 651 struct lpi2c_imx_struct *lpi2c_imx = platform_get_drvdata(pdev); 652 653 i2c_del_adapter(&lpi2c_imx->adapter); 654 655 pm_runtime_disable(&pdev->dev); 656 pm_runtime_dont_use_autosuspend(&pdev->dev); 657} 658 659static int __maybe_unused lpi2c_runtime_suspend(struct device *dev) 660{ 661 struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev); 662 663 clk_bulk_disable(lpi2c_imx->num_clks, lpi2c_imx->clks); 664 pinctrl_pm_select_sleep_state(dev); 665 666 return 0; 667} 668 669static int __maybe_unused lpi2c_runtime_resume(struct device *dev) 670{ 671 struct lpi2c_imx_struct *lpi2c_imx = dev_get_drvdata(dev); 672 int ret; 673 674 pinctrl_pm_select_default_state(dev); 675 ret = clk_bulk_enable(lpi2c_imx->num_clks, lpi2c_imx->clks); 676 if (ret) { 677 dev_err(dev, "failed to enable I2C clock, ret=%d\n", ret); 678 return ret; 679 } 680 681 return 0; 682} 683 684static const struct dev_pm_ops lpi2c_pm_ops = { 685 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 686 pm_runtime_force_resume) 687 SET_RUNTIME_PM_OPS(lpi2c_runtime_suspend, 688 lpi2c_runtime_resume, NULL) 689}; 690 691static struct platform_driver lpi2c_imx_driver = { 692 .probe = lpi2c_imx_probe, 693 .remove_new = lpi2c_imx_remove, 694 .driver = { 695 .name = DRIVER_NAME, 696 .of_match_table = lpi2c_imx_of_match, 697 .pm = &lpi2c_pm_ops, 698 }, 699}; 700 701module_platform_driver(lpi2c_imx_driver); 702 703MODULE_AUTHOR("Gao Pan <pandy.gao@nxp.com>"); 704MODULE_DESCRIPTION("I2C adapter driver for LPI2C bus"); 705MODULE_LICENSE("GPL"); 706