Searched refs:target (Results 351 - 375 of 1566) sorted by path

<<11121314151617181920>>

/linux-master/drivers/gpu/drm/nouveau/include/nvkm/engine/
H A Ddma.h13 u32 target; member in struct:nvkm_dmaobj
H A Dfalcon.h72 void (*bind_inst)(struct nvkm_falcon *, int target, u64 addr);
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dfb.h158 struct nvkm_ram_data target; member in struct:nvkm_ram
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_abi16.c643 args.target = NV_DMA_V0_TARGET_VM;
649 args.target = NV_DMA_V0_TARGET_AGP;
654 args.target = NV_DMA_V0_TARGET_VM;
H A Dnouveau_chan.c151 u32 target; local
164 target = NOUVEAU_GEM_DOMAIN_GART | NOUVEAU_GEM_DOMAIN_COHERENT;
166 target = NOUVEAU_GEM_DOMAIN_VRAM;
168 ret = nouveau_bo_new(cli, size, 0, target, 0, 0, NULL, NULL,
171 ret = nouveau_bo_pin(chan->push.buffer, target, false);
208 args.target = NV_DMA_V0_TARGET_VM;
219 args.target = NV_DMA_V0_TARGET_PCI;
225 args.target = NV_DMA_V0_TARGET_VRAM;
232 args.target = NV_DMA_V0_TARGET_AGP;
238 args.target
[all...]
H A Dnouveau_drm.c446 .target = NV_DMA_V0_TARGET_VRAM,
H A Dnouveau_svm.c115 unsigned target, cmd; local
139 /* FIXME support CPU target ie all target value < GPU_VRAM */
140 target = args->header >> NOUVEAU_SVM_BIND_TARGET_SHIFT;
141 target &= NOUVEAU_SVM_BIND_TARGET_MASK;
142 switch (target) {
H A Dnv17_fence.c98 .target = NV_DMA_V0_TARGET_VRAM,
H A Dnv50_fence.c57 .target = NV_DMA_V0_TARGET_VRAM,
/linux-master/drivers/gpu/drm/nouveau/nvkm/core/
H A Dfirmware.c187 .target = nvkm_firmware_mem_target,
H A Dmemory.c137 nvkm_memory_new(struct nvkm_device *device, enum nvkm_memory_target target, argument
149 switch (target) {
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dr535.c956 r535_dp_train_target(struct nvkm_outp *outp, u8 target, bool mst, u8 link_nr, u8 link_bw) argument
968 NVVAL(NV0073_CTRL, DP_DATA, TARGET, target);
976 if (target == 0 &&
1020 for (int target = outp->dp.lttprs; target >= 0; target--) {
1021 int ret = r535_dp_train_target(outp, target, outp->dp.lt.mst,
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/dma/
H A Duser.c85 nvif_ioctl(parent, "create dma vers %d target %d access %d "
87 args->v0.version, args->v0.target, args->v0.access,
89 dmaobj->target = args->v0.target;
102 switch (dmaobj->target) {
104 dmaobj->target = NV_MEM_TARGET_VM;
107 dmaobj->target = NV_MEM_TARGET_VRAM;
110 dmaobj->target = NV_MEM_TARGET_PCI;
114 dmaobj->target = NV_MEM_TARGET_PCI_NOSNOOP;
H A Dusernv04.c97 if (dmaobj->base.target == NV_MEM_TARGET_VM) {
100 dmaobj->base.target = NV_MEM_TARGET_PCI;
105 switch (dmaobj->base.target) {
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgf100.c404 int target; local
407 case NVKM_MEM_TARGET_VRAM: target = 0; break;
408 case NVKM_MEM_TARGET_NCOH: target = 3; break;
414 nvkm_wr32(device, 0x002270, (target << 28) | (addr >> 12));
H A Dgk104.c435 int target; local
438 case NVKM_MEM_TARGET_VRAM: target = 0; break;
439 case NVKM_MEM_TARGET_NCOH: target = 3; break;
446 nvkm_wr32(device, 0x002270, (target << 28) | (addr >> 12));
/linux-master/drivers/gpu/drm/nouveau/nvkm/falcon/
H A Dgm200.c132 gm200_flcn_bind_inst(struct nvkm_falcon *falcon, int target, u64 addr) argument
135 nvkm_falcon_wr32(falcon, 0x054, (1 << 30) | (target << 28) | (addr >> 12));
252 int target, ret; local
258 case NVKM_MEM_TARGET_VRAM: target = 0; break;
259 case NVKM_MEM_TARGET_HOST: target = 2; break;
260 case NVKM_MEM_TARGET_NCOH: target = 3; break;
266 falcon->func->bind_inst(falcon, target, nvkm_memory_addr(fw->inst));
289 case NVKM_MEM_TARGET_VRAM: target = 4; break;
290 case NVKM_MEM_TARGET_HOST: target = 5; break;
291 case NVKM_MEM_TARGET_NCOH: target
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dmcp77.c182 calc_P(u32 src, u32 target, int *div) argument
186 if (clk0 <= target) {
193 if (target - clk0 <= clk1 - target)
H A Dnv50.c345 calc_div(u32 src, u32 target, int *div) argument
349 if (clk0 <= target) {
356 if (target - clk0 <= clk1 - target)
445 * and then switch to target clocks
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dram.c111 .target = nvkm_vram_target,
H A Dramgk104.c1032 /* adjust fN to get closer to the target clock */
1127 ret = gk104_ram_calc_data(ram, freq, &ram->base.target);
1131 if (ram->base.target.freq < ram->base.former.freq) {
1132 *xits = ram->base.target;
1136 copy = &ram->base.target;
1143 ram->base.next = &ram->base.target;
1148 ram->base.next = &ram->base.target;
1454 /* memory config data for a range of target frequencies */
H A Dramnv50.c75 struct nvbios_ramcfg *cfg = &ram->base.target.bios;
154 struct nvbios_ramcfg *cfg = &ram->base.target.bios;
234 next = &ram->base.target;
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
H A Dgk20a.c355 .target = gk20a_instobj_target,
367 .target = gk20a_instobj_target,
H A Dnv04.c113 .target = nv04_instobj_target,
H A Dnv40.c112 .target = nv40_instobj_target,

Completed in 335 milliseconds

<<11121314151617181920>>