/linux-master/drivers/gpu/drm/panfrost/ |
H A D | panfrost_device.c | 42 pfdev->clock = devm_clk_get(pfdev->dev, NULL); 43 if (IS_ERR(pfdev->clock)) { 44 dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock)); 45 return PTR_ERR(pfdev->clock); 48 rate = clk_get_rate(pfdev->clock); 49 dev_info(pfdev->dev, "clock rate = %lu\n", rate); 51 err = clk_prepare_enable(pfdev->clock); 75 clk_disable_unprepare(pfdev->clock); 83 clk_disable_unprepare(pfdev->clock); [all...] |
/linux-master/arch/powerpc/boot/dts/ |
H A D | kuroboxHD.dts | 42 clock-frequency = <200000000>; /* Fixed by bootloader */ 89 clock-frequency = <97553800>; 100 clock-frequency = <97553800>; 125 clock-frequency = <133333333>;
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H A D | kuroboxHG.dts | 42 clock-frequency = <266000000>; /* Fixed by bootloader */ 89 clock-frequency = <130041000>; 100 clock-frequency = <130041000>; 125 clock-frequency = <133333333>;
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/linux-master/include/sound/ |
H A D | i2c.h | 26 void (*direction)(struct snd_i2c_bus *bus, int clock, int data); /* set line direction (0 = write, 1 = read) */ 27 void (*setlines)(struct snd_i2c_bus *bus, int clock, int data);
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/linux-master/drivers/gpu/drm/ingenic/ |
H A D | ingenic-dw-hdmi.c | 51 if (mode->clock < 13500) 54 if (mode->clock > 216000)
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/linux-master/drivers/media/i2c/ |
H A D | s5k6a3.c | 53 * @clock: pointer to &struct clk. 54 * @clock_frequency: clock frequency 65 struct clk *clock; member in struct:s5k6a3 195 ret = clk_set_rate(sensor->clock, sensor->clock_frequency); 207 ret = clk_prepare_enable(sensor->clock); 228 clk_disable_unprepare(sensor->clock); 246 clk_disable_unprepare(sensor->clock); 295 sensor->clock = devm_clk_get(sensor->dev, S5K6A3_CLK_NAME); 296 if (IS_ERR(sensor->clock)) 297 return PTR_ERR(sensor->clock); [all...] |
/linux-master/arch/powerpc/sysdev/ |
H A D | fsl_gtm.c | 70 unsigned int clock; member in struct:gtm 181 prescaler = gtm->clock / frequency; 382 const u32 *clock; local 394 clock = of_get_property(np, "clock-frequency", &size); 395 if (!clock || size != sizeof(*clock)) { 396 pr_err("%pOF: no clock-frequency\n", np); 399 gtm->clock = *clock; [all...] |
/linux-master/drivers/gpu/drm/msm/ |
H A D | msm_gpu_trace.h | 57 TP_PROTO(struct msm_gem_submit *submit, u64 elapsed, u64 clock, 59 TP_ARGS(submit, elapsed, clock, start, end), 66 __field(u64, clock) 76 __entry->clock = clock; 82 __entry->elapsed, __entry->clock,
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/linux-master/drivers/ptp/ |
H A D | ptp_vclock.c | 3 * PTP virtual clock driver 27 &vclock_hash[vclock->clock->index % HASH_SIZE(vclock_hash)]); 159 .name = "ptp virtual clock", 210 vclock->clock = ptp_clock_register(&vclock->info, &pclock->dev); 211 if (IS_ERR_OR_NULL(vclock->clock)) { 217 ptp_schedule_worker(vclock->clock, PTP_VCLOCK_REFRESH_INTERVAL); 228 ptp_clock_unregister(vclock->clock); 280 if (vclock->clock->index != vclock_index)
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/linux-master/drivers/clk/renesas/ |
H A D | rzg2l-cpg.c | 32 #include <dt-bindings/clock/renesas-cpg-mssr.h> 69 * struct clk_hw_data - clock hardware data 70 * @hw: clock hw 71 * @conf: clock configuration (register offset, shift, width) 72 * @sconf: clock status configuration (register offset, shift, width) 85 * struct sd_mux_hw_data - SD MUX clock hardware data 86 * @hw_data: clock hw data 87 * @mtable: clock mux table 97 * struct div_hw_data - divider clock hardware data 98 * @hw_data: clock h 1200 struct mstp_clock *clock = to_mod_clock(hw); local 1239 struct mstp_clock *clock = to_mod_clock(hw); local 1259 struct mstp_clock *clock = to_mod_clock(hw); local 1279 struct mstp_clock *clock = to_mod_clock(hw); local 1307 rzg2l_mod_clock_get_sibling(struct mstp_clock *clock, struct rzg2l_cpg_priv *priv) argument 1333 struct mstp_clock *clock = NULL; local [all...] |
H A D | renesas-cpg-mssr.c | 31 #include <dt-bindings/clock/renesas-cpg-mssr.h> 138 * @notifiers: Notifier chain to save/restore clock state for system resume 182 * struct mstp_clock - MSTP gating clock 184 * @index: MSTP clock number 197 struct mstp_clock *clock = to_mstp_clock(hw); local 198 struct cpg_mssr_priv *priv = clock->priv; 199 unsigned int reg = clock->index / 32; 200 unsigned int bit = clock->index % 32; 257 struct mstp_clock *clock = to_mstp_clock(hw); local 258 struct cpg_mssr_priv *priv = clock 411 struct mstp_clock *clock = NULL; local [all...] |
/linux-master/drivers/mmc/host/ |
H A D | cavium.c | 240 if (!slot->clock) 244 timeout = (slot->clock * ns) / NSEC_PER_SEC; 246 timeout = (slot->clock * 850ull) / 1000ull; 827 u64 clock, emm_switch; local 870 /* Change the clock frequency. */ 871 clock = ios->clock; 872 if (clock > 52000000) 873 clock = 52000000; 874 slot->clock 904 cvm_mmc_set_clock(struct cvm_mmc_slot *slot, unsigned int clock) argument [all...] |
H A D | sdhci-pci-arasan.c | 250 if (arasan_host->chg_clk == host->mmc->ios.clock) 253 arasan_host->chg_clk = host->mmc->ios.clock; 254 if (host->mmc->ios.clock == 200000000) 256 else if (host->mmc->ios.clock == 100000000) 258 else if (host->mmc->ios.clock == 50000000) 311 static void arasan_sdhci_set_clock(struct sdhci_host *host, unsigned int clock) argument 313 sdhci_set_clock(host, clock); 315 /* Change phy settings for the new clock */
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/linux-master/drivers/mfd/ |
H A D | sm501.c | 130 * Print out the current clock configuration for the device 320 unsigned long clock; local 326 clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); 359 smc501_writel(clock, sm->regs + SM501_POWER_MODE_0_CLOCK); 365 smc501_writel(clock, sm->regs + SM501_POWER_MODE_1_CLOCK); 377 dev_dbg(sm->dev, "gate %08lx, clock %08lx, mode %08lx\n", 378 gate, clock, mode); 389 /* clock value structure. */ 399 * Calculates the nearest discrete clock frequency that 400 * can be achieved with the specified input clock 404 sm501_calc_clock(unsigned long freq, struct sm501_clock *clock, int max_div, unsigned long mclk, long *best_diff) argument 448 sm501_calc_pll(unsigned long freq, struct sm501_clock *clock, int max_div) argument 486 sm501_select_clock(unsigned long freq, struct sm501_clock *clock, int max_div) argument 515 unsigned long clock = smc501_readl(sm->regs + SM501_CURRENT_CLOCK); local [all...] |
/linux-master/drivers/net/wireless/ath/ath5k/ |
H A D | reset.c | 43 * that don't fit on other places such as clock, sleep and power control 91 * ath5k_hw_htoclock() - Translate usec to hw clock units 95 * Translate usecs to hw clock units based on the current 96 * hw clock rate. 98 * Returns number of clock units 108 * ath5k_hw_clocktoh() - Translate hw clock units to usec 110 * @clock: value in hw clock units 112 * Translate hw clock units to usecs based on the current 113 * hw clock rat 118 ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock) argument 136 u32 usec_reg, txlat, rxlat, usec, clock, sclock, txf2txs; local 672 u32 turbo, mode, clock, bus_flags; local [all...] |
/linux-master/drivers/gpu/drm/omapdrm/dss/ |
H A D | dpi.c | 57 * Possible clock sources: 100 * disabled, DISPC clock will be disabled, and TV out will stop. 158 * shifted. So skip all odd dividers when the pixel clock is on the 261 * clock may not be possible. We try multiple times to find the clock, 262 * each time widening the pixel clock range we look for, up to 355 static int dpi_clock_update(struct dpi_data *dpi, unsigned long *clock) argument 362 if (!dpi_pll_clk_calc(dpi, *clock, &ctx)) 367 if (!dpi_dss_clk_calc(dpi, *clock, &ctx)) 376 *clock 441 unsigned long clock = mode->clock * 1000; local 462 unsigned long clock = mode->clock * 1000; local [all...] |
/linux-master/drivers/gpu/drm/panel/ |
H A D | panel-simple.c | 769 .clock = 71100, 795 .clock = 9000, 819 .clock = 33333, 929 .clock = 51450, 954 .clock = 72000, 977 .clock = 70589, 1037 .clock = 68930, 1061 .clock = 40000, 1170 .clock = 76000, 1283 .clock [all...] |
/linux-master/drivers/gpu/drm/mgag200/ |
H A D | mgag200_g200wb.c | 49 long clock = new_crtc_state->mode.clock; local 60 if (clock * testp > vcomax) 62 if (clock * testp < vcomin) 68 if (computed > clock) 69 tmpdelta = computed - clock; 71 tmpdelta = clock - computed;
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H A D | mgag200_g200eh.c | 51 long clock = new_crtc_state->mode.clock; local 62 if (clock * testp > vcomax) 64 if (clock * testp < vcomin) 70 if (computed > clock) 71 tmpdelta = computed - clock; 73 tmpdelta = clock - computed;
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H A D | mgag200_g200ev.c | 57 long clock = new_crtc_state->mode.clock; local 68 if (clock * testp > vcomax) 70 if (clock * testp < vcomin) 77 if (computed > clock) 78 tmpdelta = computed - clock; 80 tmpdelta = clock - computed;
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H A D | mgag200_g200.c | 76 long clock = new_crtc_state->mode.clock; local 87 if (clock > p_clk_max) { 88 drm_err(dev, "Pixel Clock %ld too high\n", clock); 92 if (clock < p_clk_min >> 3) 93 clock = p_clk_min >> 3; 95 f_vco = clock; 102 delta = clock; 128 drm_dbg_kms(dev, "clock: %ld vco: %ld m: %d n: %d p: %d s: %d\n", 129 clock, f_vc [all...] |
/linux-master/drivers/net/can/sja1000/ |
H A D | sja1000_platform.c | 115 /* The CAN clock frequency is half the oscillator clock frequency */ 116 priv->can.clock.freq = pdata->osc_freq / 2; 161 if (!priv->can.clock.freq) { 162 err = of_property_read_u32(of, "nxp,external-clock-frequency", &prop); 164 priv->can.clock.freq = prop / 2; 166 priv->can.clock.freq = SP_CAN_CLOCK; /* default */ 181 err = of_property_read_u32(of, "nxp,clock-out-frequency", &prop); 183 u32 divider = priv->can.clock.freq * 2 / prop; 287 priv->can.clock [all...] |
/linux-master/drivers/gpu/drm/radeon/ |
H A D | dce6_afmt.c | 271 struct radeon_crtc *crtc, unsigned int clock) 281 /* Express [24MHz / target pixel clock] as an exact rational 286 WREG32(DCCG_AUDIO_DTO0_MODULE, clock); 290 struct radeon_crtc *crtc, unsigned int clock) 301 /* Express [24MHz / target pixel clock] as an exact rational 312 clock = clock * 100 / div; 315 WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock); 318 WREG32(DCCG_AUDIO_DTO1_MODULE, clock); 270 dce6_hdmi_audio_set_dto(struct radeon_device *rdev, struct radeon_crtc *crtc, unsigned int clock) argument 289 dce6_dp_audio_set_dto(struct radeon_device *rdev, struct radeon_crtc *crtc, unsigned int clock) argument
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/linux-master/drivers/mtd/nand/raw/bcm47xxnflash/ |
H A D | ops_bcm4706.c | 38 static inline u8 bcm47xxnflash_ops_bcm4706_ns_to_cycle(u16 ns, u16 clock) argument 40 return ((ns * 1000 * clock) / 1000000) + 1; 375 u16 clock; local 408 /* Fixed reference clock 25 MHz and m = 2 */ 411 clock = freq / 1000000; 412 w0 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(15, clock); 413 w1 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(20, clock); 414 w2 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); 415 w3 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(10, clock); 416 w4 = bcm47xxnflash_ops_bcm4706_ns_to_cycle(100, clock); [all...] |
/linux-master/arch/arm/mach-omap2/ |
H A D | Makefile | 15 clock-common = clock.o 179 obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) 183 obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) 184 obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) 185 obj-$(CONFIG_SOC_AM33XX) += $(clock-common) 186 obj-$(CONFIG_SOC_OMAP5) += $(clock-common) 187 obj-$(CONFIG_SOC_DRA7XX) += $(clock-common) 188 obj-$(CONFIG_SOC_AM43XX) += $(clock-common) 190 # OMAP2 clock rat [all...] |