Searched refs:clock (Results 276 - 300 of 1865) sorted by relevance

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/linux-master/drivers/clk/mediatek/
H A Dclk-mt6765-vcodec.c13 #include <dt-bindings/clock/mt6765-clk.h>
H A Dclk-mt6765-img.c13 #include <dt-bindings/clock/mt6765-clk.h>
H A Dclk-mt6765-mipi0a.c13 #include <dt-bindings/clock/mt6765-clk.h>
H A Dclk-mt6779-ipe.c10 #include <dt-bindings/clock/mt6779-clk.h>
H A Dclk-mt6779-img.c10 #include <dt-bindings/clock/mt6779-clk.h>
H A Dclk-mt2701-img.c13 #include <dt-bindings/clock/mt2701-clk.h>
H A Dclk-mt2712-img.c13 #include <dt-bindings/clock/mt2712-clk.h>
H A Dclk-mt2712-venc.c13 #include <dt-bindings/clock/mt2712-clk.h>
H A Dclk-mt2712-jpgdec.c13 #include <dt-bindings/clock/mt2712-clk.h>
H A Dclk-mt2712-mfg.c13 #include <dt-bindings/clock/mt2712-clk.h>
H A Dclk-mt6765-cam.c13 #include <dt-bindings/clock/mt6765-clk.h>
H A Dclk-mt8167-img.c16 #include <dt-bindings/clock/mt8167-clk.h>
H A Dclk-mt8167-mfgcfg.c16 #include <dt-bindings/clock/mt8167-clk.h>
H A Dclk-mt8192-mfg.c13 #include <dt-bindings/clock/mt8192-clk.h>
H A Dclk-mt8192-venc.c13 #include <dt-bindings/clock/mt8192-clk.h>
H A Dclk-mt8192-scp_adsp.c13 #include <dt-bindings/clock/mt8192-clk.h>
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atombios.h152 int id, u32 clock);
156 u32 clock,
162 u32 clock,
204 u32 clock,
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dr8a779f0-cpg-mssr.h8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
/linux-master/include/dt-bindings/clock/
H A Dr8a779f0-cpg-mssr.h8 #include <dt-bindings/clock/renesas-cpg-mssr.h>
/linux-master/arch/x86/include/asm/vdso/
H A Dgettimeofday.h32 * If we ever reintroduce something like direct access to an MMIO clock like
35 * A load from any of these pages will segfault if the clock in question is
115 "mov %[clock], %%ebx \n"
119 : "0" (__NR_clock_gettime64), [clock] "g" (_clkid), "c" (_ts)
132 "mov %[clock], %%ebx \n"
136 : "0" (__NR_clock_gettime), [clock] "g" (_clkid), "c" (_ts)
167 "mov %[clock], %%ebx \n"
171 : "0" (__NR_clock_getres_time64), [clock] "g" (_clkid), "c" (_ts)
184 "mov %[clock], %%ebx \n"
188 : "0" (__NR_clock_getres), [clock] "
[all...]
/linux-master/include/linux/
H A Dposix-timers.h16 const clockid_t clock)
18 return ((~pid) << 3) | clock;
21 const clockid_t clock)
23 return make_process_cpuclock(tid, clock | CPUCLOCK_PERTHREAD_MASK);
143 * @it_clock: The posix timer clock id
15 make_process_cpuclock(const unsigned int pid, const clockid_t clock) argument
20 make_thread_cpuclock(const unsigned int tid, const clockid_t clock) argument
/linux-master/drivers/i2c/busses/
H A Di2c-mpc.c110 void (*setup)(struct device_node *node, struct mpc_i2c *i2c, u32 clock);
118 /* Sometimes 9th clock pulse isn't generated, and slave doesn't release
238 static int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, argument
247 if (clock == MPC_I2C_CLOCK_LEGACY) {
254 divider = mpc5xxx_fwnode_get_bus_frequency(fwnode) / clock;
275 u32 clock)
279 if (clock == MPC_I2C_CLOCK_PRESERVE) {
285 ret = mpc_i2c_get_fdr_52xx(node, clock, &i2c->real_clk);
291 dev_info(i2c->dev, "clock %u Hz (fdr=%d)\n", i2c->real_clk,
297 u32 clock)
273 mpc_i2c_setup_52xx(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
295 mpc_i2c_setup_52xx(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
303 mpc_i2c_setup_512x(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
331 mpc_i2c_setup_512x(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
426 mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 *real_clk) argument
459 mpc_i2c_setup_8xxx(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
484 mpc_i2c_setup_8xxx(struct device_node *node, struct mpc_i2c *i2c, u32 clock) argument
784 u32 clock; local
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/linux-master/drivers/mmc/host/
H A Ddw_mmc-k3.c106 ret = clk_set_rate(host->ciu_clk, ios->clock);
108 dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock);
191 unsigned int clock; local
193 clock = (ios->clock <= 25000000) ? 25000000 : ios->clock;
195 ret = clk_set_rate(host->biu_clk, clock);
197 dev_warn(host->dev, "failed to set rate %uHz\n", clock);
304 if (!ios->clock || ios->clock
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/linux-master/drivers/gpu/drm/panfrost/
H A Dpanfrost_device.c42 pfdev->clock = devm_clk_get(pfdev->dev, NULL);
43 if (IS_ERR(pfdev->clock)) {
44 dev_err(pfdev->dev, "get clock failed %ld\n", PTR_ERR(pfdev->clock));
45 return PTR_ERR(pfdev->clock);
48 rate = clk_get_rate(pfdev->clock);
49 dev_info(pfdev->dev, "clock rate = %lu\n", rate);
51 err = clk_prepare_enable(pfdev->clock);
75 clk_disable_unprepare(pfdev->clock);
83 clk_disable_unprepare(pfdev->clock);
[all...]
/linux-master/arch/powerpc/boot/dts/
H A DkuroboxHD.dts42 clock-frequency = <200000000>; /* Fixed by bootloader */
89 clock-frequency = <97553800>;
100 clock-frequency = <97553800>;
125 clock-frequency = <133333333>;

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