Searched refs:iowrite32 (Results 276 - 300 of 511) sorted by path

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/linux-master/drivers/net/ethernet/emulex/benet/
H A Dbe_cmds.c131 iowrite32(val, adapter->db + DB_MCCQ_OFFSET);
682 iowrite32(val, db);
692 iowrite32(val, db);
2157 iowrite32(SLI_PORT_CONTROL_IP_MASK,
4791 iowrite32(mask, adapter->db + PHYSDEV_CONTROL_OFFSET);
H A Dbe_main.c217 iowrite32(val, adapter->db + DB_RQ_OFFSET);
232 iowrite32(val, adapter->db + txo->db_offset);
254 iowrite32(val, adapter->db + DB_EQ_OFFSET);
271 iowrite32(val, adapter->db + DB_CQ_OFFSET);
5258 iowrite32(val, adapter->pcicfg + SLIPORT_SOFTRESET_OFFSET);
/linux-master/drivers/net/ethernet/engleder/
H A Dtsnep_main.c76 iowrite32(mask, adapter->addr + ECM_INT_ENABLE);
82 iowrite32(mask, adapter->addr + ECM_INT_ENABLE);
92 iowrite32(active, adapter->addr + ECM_INT_ACKNOWLEDGE);
162 iowrite32(md, adapter->addr + ECM_MD_CONTROL);
184 iowrite32(md, adapter->addr + ECM_MD_CONTROL);
208 iowrite32(mode, adapter->addr + ECM_STATUS);
338 iowrite32(DMA_ADDR_LOW(dma), tx->addr + TSNEP_TX_DESC_ADDR_LOW);
339 iowrite32(DMA_ADDR_HIGH(dma), tx->addr + TSNEP_TX_DESC_ADDR_HIGH);
608 iowrite32(TSNEP_CONTROL_TX_ENABLE, tx->addr + TSNEP_CONTROL);
719 iowrite32(TSNEP_CONTROL_TX_ENABL
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H A Dtsnep_ptp.c99 iowrite32(rate_offset & 0xFFFFFFFF, adapter->addr + ECM_CLOCK_RATE);
120 iowrite32(system_time >> 32, adapter->addr + ECM_SYSTEM_TIME_HIGH);
121 iowrite32(system_time & 0xFFFFFFFF,
169 iowrite32(system_time >> 32, adapter->addr + ECM_SYSTEM_TIME_HIGH);
170 iowrite32(system_time & 0xFFFFFFFF,
H A Dtsnep_rxnfc.c299 iowrite32(0, adapter->addr + TSNEP_RX_ASSIGN + i);
H A Dtsnep_selftests.c99 iowrite32(time, adapter->addr + TSNEP_GC_TIME);
136 iowrite32(0x80000001, adapter->addr + TSNEP_GCL_A + 0);
137 iowrite32(100000, adapter->addr + TSNEP_GCL_A + 4);
144 iowrite32(0x80000001, adapter->addr + TSNEP_GCL_B + 0);
145 iowrite32(100000, adapter->addr + TSNEP_GCL_B + 4);
H A Dtsnep_tc.c47 iowrite32(properties, addr);
48 iowrite32(interval, addr + sizeof(u32));
177 iowrite32(gcl->operation[index].properties, addr);
196 iowrite32(gcl->operation[i].properties, addr);
306 iowrite32(change & 0xFFFFFFFF, adapter->addr + TSNEP_GC_CHANGE);
311 iowrite32(gcl->start_time & 0xFFFFFFFF,
449 iowrite32(TSNEP_GC_OPEN | TSNEP_GC_NEXT_OPEN, adapter->addr + TSNEP_GC);
/linux-master/drivers/net/ethernet/
H A Dethoc.c250 iowrite32(data, dev->iobase + offset);
H A Dfealnx.c441 iowrite32(crvalue & ~(CR_W_RXEN), ioaddr + TCRRCR);
452 iowrite32(crvalue & ~(CR_W_RXEN+CR_W_TXEN), ioaddr + TCRRCR);
533 iowrite32(0x00000001, ioaddr + BCR);
644 iowrite32(ADVERTISE_FULL, ioaddr + ANARANLPAR);
714 iowrite32(miir, miiport);
718 iowrite32(miir, miiport);
732 iowrite32(miir, miiport);
735 iowrite32(miir, miiport);
762 iowrite32(miir, miiport);
771 iowrite32(mii
[all...]
/linux-master/drivers/net/ethernet/faraday/
H A Dftgmac100.c120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR);
121 iowrite32(maccr | FTGMAC100_MACCR_SW_RST,
176 iowrite32(maddr, priv->base + FTGMAC100_OFFSET_MAC_MADR);
177 iowrite32(laddr, priv->base + FTGMAC100_OFFSET_MAC_LADR);
246 iowrite32(fcr, priv->base + FTGMAC100_OFFSET_FCR);
255 iowrite32(reg, priv->base + FTGMAC100_OFFSET_ISR);
258 iowrite32(priv->rxdes_dma, priv->base + FTGMAC100_OFFSET_RXR_BADR);
261 iowrite32(priv->txdes_dma, priv->base + FTGMAC100_OFFSET_NPTXR_BADR);
264 iowrite32(FTGMAC100_RBSR_SIZE(RX_BUF_SIZE),
268 iowrite32(FTGMAC100_APTC_RXPOLL_CN
[all...]
H A Dftmac100.c91 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
96 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
101 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
106 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
111 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
120 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
148 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
149 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
163 iowrite32(lower_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT0);
164 iowrite32(upper_32_bit
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/linux-master/drivers/net/ethernet/freescale/enetc/
H A Denetc_hw.h428 iowrite32(val, reg);
446 iowrite32(val, reg);
467 iowrite32(val, reg);
H A Denetc_ierb.c44 iowrite32(val, ierb->regs + offset);
/linux-master/drivers/net/ethernet/freescale/
H A Dxgmac_mdio.c76 iowrite32(value, regs);
/linux-master/drivers/net/ethernet/google/gve/
H A Dgve_dqo.h71 iowrite32(val, &priv->db_bar2[index]);
96 iowrite32(val, &priv->db_bar2[index]);
H A Dgve_rx_dqo.c458 iowrite32(rx->dqo.bufq.tail, &priv->db_bar2[index]);
/linux-master/drivers/net/ethernet/intel/
H A De100.c637 iowrite32(selective_reset, &nic->csr->port);
641 iowrite32(software_reset, &nic->csr->port);
658 iowrite32(selftest | dma_addr, &nic->csr->port);
835 iowrite32(dma_addr, &nic->csr->scb.gen_ptr);
940 iowrite32((reg << 16) | (addr << 21) | dir | data, &nic->csr->mdi_ctrl);
/linux-master/drivers/net/ethernet/mellanox/mlx4/
H A Den_tx.c766 iowrite32(
/linux-master/drivers/net/ethernet/micrel/
H A Dks8842.c168 iowrite32(1, adapter->hw_addr + REQ_TIMB_DMA_RESUME);
214 iowrite32(value, adapter->hw_addr + offset);
252 iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST);
504 iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO);
752 iowrite32(0x1, adapter->hw_addr + REG_TIMB_IAR);
/linux-master/drivers/net/ethernet/microchip/
H A Dlan743x_main.c132 iowrite32(data, &adapter->csr.csr_address[offset]);
/linux-master/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_main.c255 iowrite32(0x01, &hw->reg->MAC_ADDR_LOAD);
319 iowrite32((adrmask | (0x0001 << index)), &hw->reg->ADDR_MASK);
323 iowrite32(mar_high, &hw->reg->mac_adr[index].high);
324 iowrite32(mar_low, &hw->reg->mac_adr[index].low);
326 iowrite32((adrmask & ~(0x0001 << index)), &hw->reg->ADDR_MASK);
339 iowrite32(PCH_GBE_ALL_RST, &hw->reg->RESET);
340 iowrite32(PCH_GBE_MODE_GMII_ETHER, &hw->reg->MODE);
352 iowrite32((rctl & ~PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN);
360 iowrite32((rctl | PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN);
377 iowrite32(
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/linux-master/drivers/net/ethernet/packetengines/
H A Dyellowfin.c429 iowrite32(0x80000000, ioaddr + DMACtrl);
579 iowrite32(0x80000000, ioaddr + DMACtrl);
589 iowrite32(yp->rx_ring_dma, ioaddr + RxPtr);
590 iowrite32(yp->tx_ring_dma, ioaddr + TxPtr);
597 iowrite32(0x00800080, ioaddr + TxIntrSel); /* Interrupt on Tx abort */
598 iowrite32(0x00800080, ioaddr + TxBranchSel); /* Branch on Tx abort */
599 iowrite32(0x00400040, ioaddr + TxWaitSel); /* Wait on Tx status */
600 iowrite32(0x00400040, ioaddr + RxIntrSel); /* Interrupt on Rx done */
601 iowrite32(0x00400040, ioaddr + RxBranchSel); /* Branch on Rx error */
602 iowrite32(
[all...]
/linux-master/drivers/net/ethernet/pensando/ionic/
H A Dionic_dev.c349 iowrite32(0, &idev->dev_cmd_regs->done);
350 iowrite32(1, &idev->dev_cmd_regs->doorbell);
H A Dionic_main.c495 iowrite32(0, &idev->dev_cmd_regs->doorbell);
566 iowrite32(0, &idev->dev_cmd_regs->done);
568 iowrite32(1, &idev->dev_cmd_regs->doorbell);
H A Dionic_regs.h56 iowrite32(coal, &intr_ctrl[intr_idx].coal_init);
62 iowrite32(mask, &intr_ctrl[intr_idx].mask);
73 iowrite32(cred | flags, &intr_ctrl[intr_idx].credits);
84 iowrite32(cred, &intr_ctrl[intr_idx].credits);
90 iowrite32(mask, &intr_ctrl[intr_idx].mask_assert);

Completed in 512 milliseconds

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