/linux-master/arch/powerpc/platforms/powermac/ |
H A D | low_i2c.c | 400 u8 mode_reg = host->speed; local 408 mode_reg |= KW_I2C_MODE_STANDARD; 413 mode_reg |= KW_I2C_MODE_STANDARDSUB; 418 mode_reg |= KW_I2C_MODE_COMBINED; 426 kw_write_reg(reg_mode, mode_reg | (bus->channel << 4)); 435 if ((mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_STANDARDSUB 436 || (mode_reg & KW_I2C_MODE_MODE_MASK) == KW_I2C_MODE_COMBINED)
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/linux-master/drivers/mmc/host/ |
H A D | atmel-mci.c | 285 * @mode_reg: Value of the MR register. 309 * @lock also protects mode_reg and need_clock_update since these are 364 u32 mode_reg; member in struct:atmel_mci 896 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE); 1081 atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE); 1283 atmci_writel(host, ATMCI_MR, host->mode_reg); 1430 if (!host->mode_reg) { 1462 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) 1472 host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); 1481 host->mode_reg | [all...] |
/linux-master/drivers/tty/serial/ |
H A D | xilinx_uartps.c | 819 unsigned int ctrl_reg, mode_reg; local 882 mode_reg = readl(port->membase + CDNS_UART_MR); 922 cval |= mode_reg & 1; 1164 u32 mode_reg; local 1171 mode_reg = readl(port->membase + CDNS_UART_MR); 1174 mode_reg &= ~CDNS_UART_MR_CHMODE_MASK; 1183 mode_reg |= CDNS_UART_MR_CHMODE_L_LOOP; 1185 mode_reg |= CDNS_UART_MR_CHMODE_NORM; 1188 writel(mode_reg, port->membase + CDNS_UART_MR);
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/linux-master/drivers/hwmon/ |
H A D | tps23861.c | 375 static char *port_operating_mode_string(uint8_t mode_reg, unsigned int port) argument 380 mode = (mode_reg >> (2 * port)) & OPERATING_MODE_PORT_1_MASK;
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/linux-master/drivers/regulator/ |
H A D | ab8500.c | 169 * @mode_reg: mode register 190 u8 mode_reg; member in struct:ab8500_regulator_info 414 reg = info->mode_reg; 512 info->mode_bank, info->mode_reg, &val); 1077 .mode_reg = 0x54, 1098 .mode_reg = 0x54,
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/linux-master/drivers/clk/qcom/ |
H A D | gcc-ipq806x.c | 37 .mode_reg = 0x30c0, 66 .mode_reg = 0x3160, 95 .mode_reg = 0x3140, 120 .mode_reg = 0x3200, 146 .mode_reg = 0x3240, 172 .mode_reg = 0x3300, 202 .mode_reg = 0x31c0, 247 .mode_reg = 0x31a0, 266 .mode_reg = 0x3180,
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H A D | lcc-ipq806x.c | 31 .mode_reg = 0x0,
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H A D | gcc-msm8960.c | 34 .mode_reg = 0x3160, 65 .mode_reg = 0x3140, 92 .mode_reg = 0x3200, 120 .mode_reg = 0x3240, 134 .mode_reg = 0x3300, 162 .mode_reg = 0x3280, 190 .mode_reg = 0x32c0, 218 .mode_reg = 0x3300, 232 .mode_reg = 0x3400, 264 .mode_reg [all...] |
H A D | gcc-mdm9615.c | 52 .mode_reg = 0x30c0, 94 .mode_reg = 0x3140, 123 .mode_reg = 0x31c0,
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H A D | lcc-msm8960.c | 34 .mode_reg = 0x0,
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H A D | gcc-msm8939.c | 57 .mode_reg = 0x21000, 88 .mode_reg = 0x20000, 119 .mode_reg = 0x4a000, 150 .mode_reg = 0x23000, 181 .mode_reg = 0x22000, 228 .mode_reg = 0x24000, 274 .mode_reg = 0x25000, 305 .mode_reg = 0x37000,
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H A D | mmcc-apq8084.c | 48 .mode_reg = 0x0000, 79 .mode_reg = 0x0040, 110 .mode_reg = 0x4100, 127 .mode_reg = 0x0080, 145 .mode_reg = 0x0080,
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H A D | gcc-msm8916.c | 49 .mode_reg = 0x21000, 80 .mode_reg = 0x20000, 111 .mode_reg = 0x4a000, 142 .mode_reg = 0x23000,
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H A D | mmcc-msm8974.c | 49 .mode_reg = 0x0000, 80 .mode_reg = 0x0040, 111 .mode_reg = 0x4100, 128 .mode_reg = 0x0080,
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H A D | gcc-mdm9607.c | 81 .mode_reg = 0x20000, 200 .mode_reg = 0x23000,
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H A D | gcc-msm8976.c | 60 .mode_reg = 0x21000, 93 .mode_reg = 0x4a000, 129 .mode_reg = 0x22000, 177 .mode_reg = 0x24000, 204 .mode_reg = 0x37000,
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H A D | gcc-msm8974.c | 40 .mode_reg = 0x0000, 71 .mode_reg = 0x1dc0, 160 .mode_reg = 0x0040,
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/linux-master/drivers/usb/isp1760/ |
H A D | isp1760-udc.c | 1312 u32 mode_reg = udc->is_isp1763 ? ISP1763_DC_MODE : ISP176x_DC_MODE; local 1319 isp1760_reg_write(udc->regs, mode_reg, 0); 1499 u32 mode_reg = udc->is_isp1763 ? ISP1763_DC_MODE : ISP176x_DC_MODE; local 1530 isp1760_reg_write(udc->regs, mode_reg, 0);
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/linux-master/sound/soc/codecs/ |
H A D | wm8998.c | 109 unsigned int mode_reg, mode_index; local 119 mode_reg = ARIZONA_IN2L_CONTROL; 123 mode_reg = ARIZONA_IN1L_CONTROL; 138 snd_soc_component_update_bits(component, mode_reg,
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/linux-master/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | hw.h | 376 &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[NV_CIO_CRE_HCUR_ADDR1_INDEX];
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H A D | tvnv17.c | 404 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[ 465 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];
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H A D | tvmodesnv17.c | 546 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];
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/linux-master/drivers/media/i2c/ |
H A D | msp3400-kthreads.c | 77 int mode_reg; member in struct:msp3400c_init_data_dem 224 msp_write_dem(client, 0x0083, data->mode_reg);
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/linux-master/drivers/scsi/ |
H A D | nsp32.c | 1449 unsigned char mode_reg; local 1471 mode_reg = nsp32_index_read1(base, CHIP_MODE); 1476 (mode_reg & OPTF) ? "yes" : "no"); 1479 (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
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/linux-master/drivers/gpu/drm/display/ |
H A D | drm_dp_helper.c | 3892 u8 mode_reg; local 3894 ret = drm_dp_dpcd_readb(aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, &mode_reg); 3901 *current_mode = (mode_reg & DP_EDP_BACKLIGHT_CONTROL_MODE_MASK);
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