1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2020 Sartura Ltd.
4 *
5 * Driver for the TI TPS23861 PoE PSE.
6 *
7 * Author: Robert Marko <robert.marko@sartura.hr>
8 */
9
10#include <linux/bitfield.h>
11#include <linux/debugfs.h>
12#include <linux/delay.h>
13#include <linux/hwmon-sysfs.h>
14#include <linux/hwmon.h>
15#include <linux/i2c.h>
16#include <linux/module.h>
17#include <linux/of.h>
18#include <linux/regmap.h>
19
20#define TEMPERATURE			0x2c
21#define INPUT_VOLTAGE_LSB		0x2e
22#define INPUT_VOLTAGE_MSB		0x2f
23#define PORT_1_CURRENT_LSB		0x30
24#define PORT_1_CURRENT_MSB		0x31
25#define PORT_1_VOLTAGE_LSB		0x32
26#define PORT_1_VOLTAGE_MSB		0x33
27#define PORT_2_CURRENT_LSB		0x34
28#define PORT_2_CURRENT_MSB		0x35
29#define PORT_2_VOLTAGE_LSB		0x36
30#define PORT_2_VOLTAGE_MSB		0x37
31#define PORT_3_CURRENT_LSB		0x38
32#define PORT_3_CURRENT_MSB		0x39
33#define PORT_3_VOLTAGE_LSB		0x3a
34#define PORT_3_VOLTAGE_MSB		0x3b
35#define PORT_4_CURRENT_LSB		0x3c
36#define PORT_4_CURRENT_MSB		0x3d
37#define PORT_4_VOLTAGE_LSB		0x3e
38#define PORT_4_VOLTAGE_MSB		0x3f
39#define PORT_N_CURRENT_LSB_OFFSET	0x04
40#define PORT_N_VOLTAGE_LSB_OFFSET	0x04
41#define VOLTAGE_CURRENT_MASK		GENMASK(13, 0)
42#define PORT_1_RESISTANCE_LSB		0x60
43#define PORT_1_RESISTANCE_MSB		0x61
44#define PORT_2_RESISTANCE_LSB		0x62
45#define PORT_2_RESISTANCE_MSB		0x63
46#define PORT_3_RESISTANCE_LSB		0x64
47#define PORT_3_RESISTANCE_MSB		0x65
48#define PORT_4_RESISTANCE_LSB		0x66
49#define PORT_4_RESISTANCE_MSB		0x67
50#define PORT_N_RESISTANCE_LSB_OFFSET	0x02
51#define PORT_RESISTANCE_MASK		GENMASK(13, 0)
52#define PORT_RESISTANCE_RSN_MASK	GENMASK(15, 14)
53#define PORT_RESISTANCE_RSN_OTHER	0
54#define PORT_RESISTANCE_RSN_LOW		1
55#define PORT_RESISTANCE_RSN_OPEN	2
56#define PORT_RESISTANCE_RSN_SHORT	3
57#define PORT_1_STATUS			0x0c
58#define PORT_2_STATUS			0x0d
59#define PORT_3_STATUS			0x0e
60#define PORT_4_STATUS			0x0f
61#define PORT_STATUS_CLASS_MASK		GENMASK(7, 4)
62#define PORT_STATUS_DETECT_MASK		GENMASK(3, 0)
63#define PORT_CLASS_UNKNOWN		0
64#define PORT_CLASS_1			1
65#define PORT_CLASS_2			2
66#define PORT_CLASS_3			3
67#define PORT_CLASS_4			4
68#define PORT_CLASS_RESERVED		5
69#define PORT_CLASS_0			6
70#define PORT_CLASS_OVERCURRENT		7
71#define PORT_CLASS_MISMATCH		8
72#define PORT_DETECT_UNKNOWN		0
73#define PORT_DETECT_SHORT		1
74#define PORT_DETECT_RESERVED		2
75#define PORT_DETECT_RESISTANCE_LOW	3
76#define PORT_DETECT_RESISTANCE_OK	4
77#define PORT_DETECT_RESISTANCE_HIGH	5
78#define PORT_DETECT_OPEN_CIRCUIT	6
79#define PORT_DETECT_RESERVED_2		7
80#define PORT_DETECT_MOSFET_FAULT	8
81#define PORT_DETECT_LEGACY		9
82/* Measurment beyond clamp voltage */
83#define PORT_DETECT_CAPACITANCE_INVALID_BEYOND	10
84/* Insufficient voltage delta */
85#define PORT_DETECT_CAPACITANCE_INVALID_DELTA	11
86#define PORT_DETECT_CAPACITANCE_OUT_OF_RANGE	12
87#define POE_PLUS			0x40
88#define OPERATING_MODE			0x12
89#define OPERATING_MODE_OFF		0
90#define OPERATING_MODE_MANUAL		1
91#define OPERATING_MODE_SEMI		2
92#define OPERATING_MODE_AUTO		3
93#define OPERATING_MODE_PORT_1_MASK	GENMASK(1, 0)
94#define OPERATING_MODE_PORT_2_MASK	GENMASK(3, 2)
95#define OPERATING_MODE_PORT_3_MASK	GENMASK(5, 4)
96#define OPERATING_MODE_PORT_4_MASK	GENMASK(7, 6)
97
98#define DETECT_CLASS_RESTART		0x18
99#define POWER_ENABLE			0x19
100#define TPS23861_NUM_PORTS		4
101
102#define TPS23861_GENERAL_MASK_1		0x17
103#define TPS23861_CURRENT_SHUNT_MASK	BIT(0)
104
105#define TEMPERATURE_LSB			652 /* 0.652 degrees Celsius */
106#define VOLTAGE_LSB			3662 /* 3.662 mV */
107#define SHUNT_RESISTOR_DEFAULT		255000 /* 255 mOhm */
108#define CURRENT_LSB_250			62260 /* 62.260 uA */
109#define CURRENT_LSB_255			61039 /* 61.039 uA */
110#define RESISTANCE_LSB			110966 /* 11.0966 Ohm*/
111#define RESISTANCE_LSB_LOW		157216 /* 15.7216 Ohm*/
112
113struct tps23861_data {
114	struct regmap *regmap;
115	u32 shunt_resistor;
116	struct i2c_client *client;
117	struct dentry *debugfs_dir;
118};
119
120static struct regmap_config tps23861_regmap_config = {
121	.reg_bits = 8,
122	.val_bits = 8,
123	.max_register = 0x6f,
124};
125
126static int tps23861_read_temp(struct tps23861_data *data, long *val)
127{
128	unsigned int regval;
129	int err;
130
131	err = regmap_read(data->regmap, TEMPERATURE, &regval);
132	if (err < 0)
133		return err;
134
135	*val = (regval * TEMPERATURE_LSB) - 20000;
136
137	return 0;
138}
139
140static int tps23861_read_voltage(struct tps23861_data *data, int channel,
141				 long *val)
142{
143	__le16 regval;
144	long raw_val;
145	int err;
146
147	if (channel < TPS23861_NUM_PORTS) {
148		err = regmap_bulk_read(data->regmap,
149				       PORT_1_VOLTAGE_LSB + channel * PORT_N_VOLTAGE_LSB_OFFSET,
150				       &regval, 2);
151	} else {
152		err = regmap_bulk_read(data->regmap,
153				       INPUT_VOLTAGE_LSB,
154				       &regval, 2);
155	}
156	if (err < 0)
157		return err;
158
159	raw_val = le16_to_cpu(regval);
160	*val = (FIELD_GET(VOLTAGE_CURRENT_MASK, raw_val) * VOLTAGE_LSB) / 1000;
161
162	return 0;
163}
164
165static int tps23861_read_current(struct tps23861_data *data, int channel,
166				 long *val)
167{
168	long raw_val, current_lsb;
169	__le16 regval;
170
171	int err;
172
173	if (data->shunt_resistor == SHUNT_RESISTOR_DEFAULT)
174		current_lsb = CURRENT_LSB_255;
175	else
176		current_lsb = CURRENT_LSB_250;
177
178	err = regmap_bulk_read(data->regmap,
179			       PORT_1_CURRENT_LSB + channel * PORT_N_CURRENT_LSB_OFFSET,
180			       &regval, 2);
181	if (err < 0)
182		return err;
183
184	raw_val = le16_to_cpu(regval);
185	*val = (FIELD_GET(VOLTAGE_CURRENT_MASK, raw_val) * current_lsb) / 1000000;
186
187	return 0;
188}
189
190static int tps23861_port_disable(struct tps23861_data *data, int channel)
191{
192	unsigned int regval = 0;
193	int err;
194
195	regval |= BIT(channel + 4);
196	err = regmap_write(data->regmap, POWER_ENABLE, regval);
197
198	return err;
199}
200
201static int tps23861_port_enable(struct tps23861_data *data, int channel)
202{
203	unsigned int regval = 0;
204	int err;
205
206	regval |= BIT(channel);
207	regval |= BIT(channel + 4);
208	err = regmap_write(data->regmap, DETECT_CLASS_RESTART, regval);
209
210	return err;
211}
212
213static umode_t tps23861_is_visible(const void *data, enum hwmon_sensor_types type,
214				   u32 attr, int channel)
215{
216	switch (type) {
217	case hwmon_temp:
218		switch (attr) {
219		case hwmon_temp_input:
220		case hwmon_temp_label:
221			return 0444;
222		default:
223			return 0;
224		}
225	case hwmon_in:
226		switch (attr) {
227		case hwmon_in_input:
228		case hwmon_in_label:
229			return 0444;
230		case hwmon_in_enable:
231			return 0200;
232		default:
233			return 0;
234		}
235	case hwmon_curr:
236		switch (attr) {
237		case hwmon_curr_input:
238		case hwmon_curr_label:
239			return 0444;
240		default:
241			return 0;
242		}
243	default:
244		return 0;
245	}
246}
247
248static int tps23861_write(struct device *dev, enum hwmon_sensor_types type,
249			  u32 attr, int channel, long val)
250{
251	struct tps23861_data *data = dev_get_drvdata(dev);
252	int err;
253
254	switch (type) {
255	case hwmon_in:
256		switch (attr) {
257		case hwmon_in_enable:
258			if (val == 0)
259				err = tps23861_port_disable(data, channel);
260			else if (val == 1)
261				err = tps23861_port_enable(data, channel);
262			else
263				err = -EINVAL;
264			break;
265		default:
266			return -EOPNOTSUPP;
267		}
268		break;
269	default:
270		return -EOPNOTSUPP;
271	}
272
273	return err;
274}
275
276static int tps23861_read(struct device *dev, enum hwmon_sensor_types type,
277			 u32 attr, int channel, long *val)
278{
279	struct tps23861_data *data = dev_get_drvdata(dev);
280	int err;
281
282	switch (type) {
283	case hwmon_temp:
284		switch (attr) {
285		case hwmon_temp_input:
286			err = tps23861_read_temp(data, val);
287			break;
288		default:
289			return -EOPNOTSUPP;
290		}
291		break;
292	case hwmon_in:
293		switch (attr) {
294		case hwmon_in_input:
295			err = tps23861_read_voltage(data, channel, val);
296			break;
297		default:
298			return -EOPNOTSUPP;
299		}
300		break;
301	case hwmon_curr:
302		switch (attr) {
303		case hwmon_curr_input:
304			err = tps23861_read_current(data, channel, val);
305			break;
306		default:
307			return -EOPNOTSUPP;
308		}
309		break;
310	default:
311		return -EOPNOTSUPP;
312	}
313
314	return err;
315}
316
317static const char * const tps23861_port_label[] = {
318	"Port1",
319	"Port2",
320	"Port3",
321	"Port4",
322	"Input",
323};
324
325static int tps23861_read_string(struct device *dev,
326				enum hwmon_sensor_types type,
327				u32 attr, int channel, const char **str)
328{
329	switch (type) {
330	case hwmon_in:
331	case hwmon_curr:
332		*str = tps23861_port_label[channel];
333		break;
334	case hwmon_temp:
335		*str = "Die";
336		break;
337	default:
338		return -EOPNOTSUPP;
339	}
340
341	return 0;
342}
343
344static const struct hwmon_channel_info * const tps23861_info[] = {
345	HWMON_CHANNEL_INFO(chip,
346			   HWMON_C_REGISTER_TZ),
347	HWMON_CHANNEL_INFO(temp,
348			   HWMON_T_INPUT | HWMON_T_LABEL),
349	HWMON_CHANNEL_INFO(in,
350			   HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
351			   HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
352			   HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
353			   HWMON_I_INPUT | HWMON_I_ENABLE | HWMON_I_LABEL,
354			   HWMON_I_INPUT | HWMON_I_LABEL),
355	HWMON_CHANNEL_INFO(curr,
356			   HWMON_C_INPUT | HWMON_C_LABEL,
357			   HWMON_C_INPUT | HWMON_C_LABEL,
358			   HWMON_C_INPUT | HWMON_C_LABEL,
359			   HWMON_C_INPUT | HWMON_C_LABEL),
360	NULL
361};
362
363static const struct hwmon_ops tps23861_hwmon_ops = {
364	.is_visible = tps23861_is_visible,
365	.write = tps23861_write,
366	.read = tps23861_read,
367	.read_string = tps23861_read_string,
368};
369
370static const struct hwmon_chip_info tps23861_chip_info = {
371	.ops = &tps23861_hwmon_ops,
372	.info = tps23861_info,
373};
374
375static char *port_operating_mode_string(uint8_t mode_reg, unsigned int port)
376{
377	unsigned int mode = ~0;
378
379	if (port < TPS23861_NUM_PORTS)
380		mode = (mode_reg >> (2 * port)) & OPERATING_MODE_PORT_1_MASK;
381
382	switch (mode) {
383	case OPERATING_MODE_OFF:
384		return "Off";
385	case OPERATING_MODE_MANUAL:
386		return "Manual";
387	case OPERATING_MODE_SEMI:
388		return "Semi-Auto";
389	case OPERATING_MODE_AUTO:
390		return "Auto";
391	default:
392		return "Invalid";
393	}
394}
395
396static char *port_detect_status_string(uint8_t status_reg)
397{
398	switch (FIELD_GET(PORT_STATUS_DETECT_MASK, status_reg)) {
399	case PORT_DETECT_UNKNOWN:
400		return "Unknown device";
401	case PORT_DETECT_SHORT:
402		return "Short circuit";
403	case PORT_DETECT_RESISTANCE_LOW:
404		return "Too low resistance";
405	case PORT_DETECT_RESISTANCE_OK:
406		return "Valid resistance";
407	case PORT_DETECT_RESISTANCE_HIGH:
408		return "Too high resistance";
409	case PORT_DETECT_OPEN_CIRCUIT:
410		return "Open circuit";
411	case PORT_DETECT_MOSFET_FAULT:
412		return "MOSFET fault";
413	case PORT_DETECT_LEGACY:
414		return "Legacy device";
415	case PORT_DETECT_CAPACITANCE_INVALID_BEYOND:
416		return "Invalid capacitance, beyond clamp voltage";
417	case PORT_DETECT_CAPACITANCE_INVALID_DELTA:
418		return "Invalid capacitance, insufficient voltage delta";
419	case PORT_DETECT_CAPACITANCE_OUT_OF_RANGE:
420		return "Valid capacitance, outside of legacy range";
421	case PORT_DETECT_RESERVED:
422	case PORT_DETECT_RESERVED_2:
423	default:
424		return "Invalid";
425	}
426}
427
428static char *port_class_status_string(uint8_t status_reg)
429{
430	switch (FIELD_GET(PORT_STATUS_CLASS_MASK, status_reg)) {
431	case PORT_CLASS_UNKNOWN:
432		return "Unknown";
433	case PORT_CLASS_RESERVED:
434	case PORT_CLASS_0:
435		return "0";
436	case PORT_CLASS_1:
437		return "1";
438	case PORT_CLASS_2:
439		return "2";
440	case PORT_CLASS_3:
441		return "3";
442	case PORT_CLASS_4:
443		return "4";
444	case PORT_CLASS_OVERCURRENT:
445		return "Overcurrent";
446	case PORT_CLASS_MISMATCH:
447		return "Mismatch";
448	default:
449		return "Invalid";
450	}
451}
452
453static char *port_poe_plus_status_string(uint8_t poe_plus, unsigned int port)
454{
455	return (BIT(port + 4) & poe_plus) ? "Yes" : "No";
456}
457
458static int tps23861_port_resistance(struct tps23861_data *data, int port)
459{
460	unsigned int raw_val;
461	__le16 regval;
462
463	regmap_bulk_read(data->regmap,
464			 PORT_1_RESISTANCE_LSB + PORT_N_RESISTANCE_LSB_OFFSET * port,
465			 &regval,
466			 2);
467
468	raw_val = le16_to_cpu(regval);
469	switch (FIELD_GET(PORT_RESISTANCE_RSN_MASK, raw_val)) {
470	case PORT_RESISTANCE_RSN_OTHER:
471		return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB) / 10000;
472	case PORT_RESISTANCE_RSN_LOW:
473		return (FIELD_GET(PORT_RESISTANCE_MASK, raw_val) * RESISTANCE_LSB_LOW) / 10000;
474	case PORT_RESISTANCE_RSN_SHORT:
475	case PORT_RESISTANCE_RSN_OPEN:
476	default:
477		return 0;
478	}
479}
480
481static int tps23861_port_status_show(struct seq_file *s, void *data)
482{
483	struct tps23861_data *priv = s->private;
484	unsigned int i, mode, poe_plus, status;
485
486	regmap_read(priv->regmap, OPERATING_MODE, &mode);
487	regmap_read(priv->regmap, POE_PLUS, &poe_plus);
488
489	for (i = 0; i < TPS23861_NUM_PORTS; i++) {
490		regmap_read(priv->regmap, PORT_1_STATUS + i, &status);
491
492		seq_printf(s, "Port: \t\t%d\n", i + 1);
493		seq_printf(s, "Operating mode: %s\n", port_operating_mode_string(mode, i));
494		seq_printf(s, "Detected: \t%s\n", port_detect_status_string(status));
495		seq_printf(s, "Class: \t\t%s\n", port_class_status_string(status));
496		seq_printf(s, "PoE Plus: \t%s\n", port_poe_plus_status_string(poe_plus, i));
497		seq_printf(s, "Resistance: \t%d\n", tps23861_port_resistance(priv, i));
498		seq_putc(s, '\n');
499	}
500
501	return 0;
502}
503
504DEFINE_SHOW_ATTRIBUTE(tps23861_port_status);
505
506static void tps23861_init_debugfs(struct tps23861_data *data,
507				  struct device *hwmon_dev)
508{
509	const char *debugfs_name;
510
511	debugfs_name = devm_kasprintf(&data->client->dev, GFP_KERNEL, "%s-%s",
512				      data->client->name, dev_name(hwmon_dev));
513	if (!debugfs_name)
514		return;
515
516	data->debugfs_dir = debugfs_create_dir(debugfs_name, NULL);
517
518	debugfs_create_file("port_status",
519			    0400,
520			    data->debugfs_dir,
521			    data,
522			    &tps23861_port_status_fops);
523}
524
525static int tps23861_probe(struct i2c_client *client)
526{
527	struct device *dev = &client->dev;
528	struct tps23861_data *data;
529	struct device *hwmon_dev;
530	u32 shunt_resistor;
531
532	data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
533	if (!data)
534		return -ENOMEM;
535
536	data->client = client;
537	i2c_set_clientdata(client, data);
538
539	data->regmap = devm_regmap_init_i2c(client, &tps23861_regmap_config);
540	if (IS_ERR(data->regmap)) {
541		dev_err(dev, "failed to allocate register map\n");
542		return PTR_ERR(data->regmap);
543	}
544
545	if (!of_property_read_u32(dev->of_node, "shunt-resistor-micro-ohms", &shunt_resistor))
546		data->shunt_resistor = shunt_resistor;
547	else
548		data->shunt_resistor = SHUNT_RESISTOR_DEFAULT;
549
550	if (data->shunt_resistor == SHUNT_RESISTOR_DEFAULT)
551		regmap_clear_bits(data->regmap,
552				  TPS23861_GENERAL_MASK_1,
553				  TPS23861_CURRENT_SHUNT_MASK);
554	else
555		regmap_set_bits(data->regmap,
556				TPS23861_GENERAL_MASK_1,
557				TPS23861_CURRENT_SHUNT_MASK);
558
559	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
560							 data, &tps23861_chip_info,
561							 NULL);
562	if (IS_ERR(hwmon_dev))
563		return PTR_ERR(hwmon_dev);
564
565	tps23861_init_debugfs(data, hwmon_dev);
566
567	return 0;
568}
569
570static void tps23861_remove(struct i2c_client *client)
571{
572	struct tps23861_data *data = i2c_get_clientdata(client);
573
574	debugfs_remove_recursive(data->debugfs_dir);
575}
576
577static const struct of_device_id __maybe_unused tps23861_of_match[] = {
578	{ .compatible = "ti,tps23861", },
579	{ },
580};
581MODULE_DEVICE_TABLE(of, tps23861_of_match);
582
583static struct i2c_driver tps23861_driver = {
584	.probe			= tps23861_probe,
585	.remove			= tps23861_remove,
586	.driver = {
587		.name		= "tps23861",
588		.of_match_table	= of_match_ptr(tps23861_of_match),
589	},
590};
591module_i2c_driver(tps23861_driver);
592
593MODULE_LICENSE("GPL");
594MODULE_AUTHOR("Robert Marko <robert.marko@sartura.hr>");
595MODULE_DESCRIPTION("TI TPS23861 PoE PSE");
596