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409c39ec |
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06-Oct-2023 |
Rob Herring <robh@kernel.org> |
clk: Use device_get_match_data() Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231006213959.334439-1-robh@kernel.org Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #msm part Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> # Samsung Acked-by: David Lechner <david@lechnology.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
c4dc24da |
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12-Mar-2023 |
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> |
clk: qcom: Convert to platform remove callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230312161512.2715500-23-u.kleine-koenig@pengutronix.de
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#
e38fc8f0 |
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23-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: gcc-msm8960: use parent_hws/_data instead of parent_names Convert the clock driver to specify parent data rather than parent names, to actually bind using 'clock-names' specified in the DTS rather than global clock names. Use parent_hws where possible to refer parent clocks directly, skipping the lookup. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013) Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220623120418.250589-5-dmitry.baryshkov@linaro.org
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#
d247abe6 |
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23-Jun-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: gcc-msm8960: use ARRAY_SIZE instead of specifying num_parents Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: David Heidelberg <david@ixit.cz> # tested on Nexus 7 (2013) Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20220623120418.250589-4-dmitry.baryshkov@linaro.org
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#
93b793d8 |
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21-May-2022 |
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> |
clk: qcom: gcc-msm8960: create tsens device if there are no child nodes Currently gcc-msm8960 driver manually creates tsens platform device manually. It would be better to follow IPQ8064 approach, where tsens device is defined as gcc's child device in the device tree. If nothing else, it removes gcc's dependency on QFPROM, thus allowing clock controller to be probed earlier. Don't create it in case there are available child nodes (tsens) inside the gcc's device tree node. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220521151437.1489111-4-dmitry.baryshkov@linaro.org
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#
9c92ab61 |
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29-May-2019 |
Thomas Gleixner <tglx@linutronix.de> |
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282 Based on 1 normalized pattern(s): this software is licensed under the terms of the gnu general public license version 2 as published by the free software foundation and may be copied distributed and modified under those terms this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 285 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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#
72ad7207 |
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14-Aug-2018 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Add MSM8960/APQ8064's HFPLLs Describe the HFPLLs present on MSM8960 and APQ8064 devices. Acked-by: Rob Herring <robh@kernel.org> (bindings) Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Tested-by: Craig Tatlor <ctatlor97@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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#
04cdd5af |
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19-Jun-2018 |
Jerome Brunet <jbrunet@baylibre.com> |
clk: qcom: drop CLK_SET_RATE_GATE from sdc clocks the mmci driver (drivers/mmc/host/mmci.c) does the following sequence: * clk_prepare_enable() * clk_set_rate() on SDCx_clk which is a children of SDCx_src. SDCx_src has CLK_SET_RATE_GATE so this sequence should not be allowed but this was not enforced. IOW, the flag is ignored. Dropping the flag won't change anything to the current behaviour of the platform. CLK_SET_RATE_GATE is being fixed and enforced now. If the flag was kept, the mmci driver would receive -EBUSY when calling clk_set_rate() Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20180619134051.16726-2-jbrunet@baylibre.com
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#
81925c5e |
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01-Mar-2016 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Remove CLK_IS_ROOT This flag is a no-op now. Remove usage of the flag. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
0f75e1a3 |
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01-Mar-2016 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: msm8960: Fix ce3_src register offset The offset seems to have been copied from the sata clk. Fix it so that enabling the crypto engine source clk works. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org> Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
732d6913 |
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22-Feb-2016 |
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
clk: qcom: msm8960: fix ce3_core clk enable register This patch corrects the enable register offset which is actually 0x36cc instead of 0x36c4 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Fixes: 5f775498bdc4 ("clk: qcom: Fully support apq8064 global clock control") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
c430daf9 |
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12-Feb-2016 |
Stephen Boyd <sboyd@codeaurora.org> |
Revert "clk: qcom: Specify LE device endianness" This reverts commit 329cabcecf94d8d7821e729dda284ba9dec44c87. The commit that caused us to specify LE device endianness here, 29bb45f25ff3 (regmap-mmio: Use native endianness for read/write, 2015-10-29), has been reverted in mainline so now when we specify LE it actively breaks big endian kernels because the byte swapping in regmap-mmio is incorrect. Let's revert this change because it will 1) fix the big endian kernels and 2) be redundant to specify LE because that will become the default soon. Cc: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@baylibre.com> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
329cabce |
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09-Nov-2015 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Specify LE device endianness All these clock controllers are little endian devices, but so far we've been relying on the regmap mmio bus handling this for us without explicitly stating that fact. After commit 4a98da2164cf (regmap-mmio: Use native endianness for read/write, 2015-10-29), the regmap mmio bus will read/write with the __raw_*() IO accessors, instead of using the readl/writel() APIs that do proper byte swapping for little endian devices. So if we're running on a big endian processor and haven't specified the endianness explicitly in the regmap config or in DT, we're going to switch from doing little endian byte swapping to big endian accesses without byte swapping, leading to some confusing results. On my apq8074 dragonboard, this causes the device to fail to boot as we access the clock controller with big endian IO accesses even though the device is little endian. Specify the endianness explicitly so that the regmap core properly byte swaps the accesses for us. Reported-by: Kevin Hilman <khilman@linaro.org> Tested-by: Tyler Baker <tyler.baker@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
a085f877 |
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26-Oct-2015 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Move cxo/pxo/xo into dt files Put these clocks into the dt files instead of registering them from C code. This provides a few benefits. It allows us to specify the frequency of these clocks at the board level instead of hard-coding them in the driver. It allows us to insert an RPM clock in between the consumers of the crystals and the actual clock. And finally, it helps us transition the GCC driver to use RPM clocks when that configuration is enabled. Cc: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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53c929c9 |
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07-Oct-2015 |
Rajendra Nayak <rnayak@codeaurora.org> |
clk: qcom: create virtual child device for TSENS 8960 family of devices have TSENS as part of GCC in hardware. Hence DT would represent a GCC node with GCC properties as well as TSENS. Create a virtual platform child device here for TSENS so the driver can probe it and use the parent (GCC) to extract DT properties. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> [sboyd@codeaurora.org: Massaged to work with devm friendly qcom_cc_probe()] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
9bc432cb |
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08-Oct-2015 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Drop calls to qcom_cc_remove() Now that qcom_cc_remove() is a nop, drop calls to qcom_cc_remove() and any empty driver remove functions. Cc: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
adb11a40 |
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06-Jul-2015 |
Georgi Djakov <georgi.djakov@linaro.org> |
clk: qcom: Constify the parent names arrays Make const both the array and the strings, so they can be moved to .rodata section. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
293d2e97 |
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20-Mar-2015 |
Georgi Djakov <georgi.djakov@linaro.org> |
clk: qcom: Introduce parent_map tables In the current parent mapping code, we can get duplicate or inconsistent indexes, which leads to discrepancy between the number of elements in the array and the number of parents. Until now, this was solved with some reordering but this is not always possible. This patch introduces index tables that are used to define the relations between the PLL source and the hardware mux configuration value. To accomplish this, here we do the following: - Define a parent_map struct to map the relations between PLL source index and register configuration value. - Add a qcom_find_src_index() function for finding the index of a clock matching the specific PLL configuration. - Update the {set,get}_parent RCG functions use the newly introduced parent_map struct. - Convert all existing drivers to the new parent_map tables. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
4be8fc04 |
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29-Jan-2015 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Add PLL4 vote clock This clock is needed for most audio clock frequencies. Add it. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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#
1f46c71d |
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20-Oct-2014 |
Wolfram Sang <wsa@kernel.org> |
clk: qcom: drop owner assignment from platform_drivers A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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#
5f775498 |
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10-Jul-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Fully support apq8064 global clock control Add in the handful of new clocks and introduce a new reset table with the few new resets. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
7f9b72ae |
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10-Jul-2014 |
Srinivas Kandagatla <srinivas.kandagatla@linaro.org> |
clk: qcom: add clocks necessary for apq8064 sdcc This patch adds clocks necessary for SD card controller on apq8064 SOC. Without this patch the clocks are not visible to the sdcc driver. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Reviewed-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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#
2c07e3c7 |
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04-Apr-2014 |
Kumar Gala <galak@codeaurora.org> |
clk: qcom: Various fixes for MSM8960's global clock controller * Remove CE2_SLEEP_CLK, doesn't exist on 8960 family SoCs * Fix incorrect offset for PMIC_SSBI2_RESET * Fix typo: SIC_TIC -> SPS_TIC_H SFAB_ADM0_M2_A_CLK -> SFAB_ADM0_M2_H_CLK * Fix naming convention: SFAB_CFPB_S_HCLK -> SFAB_CFPB_S_H_CLK SATA_SRC_CLK -> SATA_CLK_SRC Signed-off-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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#
2d85a713 |
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04-Apr-2014 |
Kumar Gala <galak@codeaurora.org> |
clk: qcom: Add basic support for APQ8064 global clock controller clocks The APQ8064 and MSM8960 share a significant amount of clock data and code between the two SoCs. Rather than duplicating the data we just add support for a unqiue APQ8064 clock table into the MSM8960 code. For now add just enough clocks to get a basic serial port going on an APQ8064 device. Signed-off-by: Kumar Gala <galak@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: trivial conflict due to missing ipq8064 support]
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#
49fc825f |
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21-Mar-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Consolidate common probe code Most of the probe code is the same between all the different clock controllers. Consolidate the code into a common.c file. This makes changes to the common probe parts easier and reduces chances for bugs. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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#
2ec94130 |
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15-Jan-2014 |
Stephen Boyd <sboyd@codeaurora.org> |
clk: qcom: Add support for MSM8960's global clock controller (GCC) Add a driver for the global clock controller found on MSM8960 based platforms. This should allow most non-multimedia device drivers to probe and control their clocks. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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