Searched refs:__raw_writel (Results 26 - 50 of 427) sorted by relevance

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/linux-master/arch/mips/include/asm/mach-au1x00/
H A Dau1000_dma.h160 __raw_writel(DMA_BE0, chan->io + DMA_MODE_SET);
169 __raw_writel(DMA_BE1, chan->io + DMA_MODE_SET);
177 __raw_writel(DMA_BE0 | DMA_BE1, chan->io + DMA_MODE_SET);
186 __raw_writel(DMA_GO, chan->io + DMA_MODE_SET);
198 __raw_writel(DMA_GO, chan->io + DMA_MODE_CLEAR);
218 __raw_writel(~DMA_GO, chan->io + DMA_MODE_CLEAR);
242 __raw_writel(CPHYSADDR(chan->fifo_addr), chan->io + DMA_PERIPHERAL_ADDR);
248 __raw_writel(~mode, chan->io + DMA_MODE_CLEAR);
249 __raw_writel(mode, chan->io + DMA_MODE_SET);
307 __raw_writel(CPHYSADD
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/linux-master/drivers/clocksource/
H A Dmxs_timer.c70 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base +
76 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ_EN, mxs_timrot_base +
82 __raw_writel(BM_TIMROT_TIMCTRLn_IRQ, mxs_timrot_base +
96 __raw_writel(evt, mxs_timrot_base + HW_TIMROT_TIMCOUNTn(0));
105 __raw_writel(evt, mxs_timrot_base + HW_TIMROT_FIXED_COUNTn(0));
127 __raw_writel(0xffff, mxs_timrot_base + HW_TIMROT_TIMCOUNTn(1));
129 __raw_writel(0xffffffff,
234 __raw_writel((timrot_is_v1() ?
242 __raw_writel((timrot_is_v1() ?
250 __raw_writel(
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H A Dtimer-vf-pit.c38 __raw_writel(PITTCTRL_TEN | PITTCTRL_TIE, clkevt_base + PITTCTRL);
43 __raw_writel(0, clkevt_base + PITTCTRL);
48 __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
59 __raw_writel(0, clksrc_base + PITTCTRL);
60 __raw_writel(~0UL, clksrc_base + PITLDVAL);
61 __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
79 __raw_writel(delta - 1, clkevt_base + PITLDVAL);
128 __raw_writel(0, clkevt_base + PITTCTRL);
129 __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
186 __raw_writel(~PITMCR_MDI
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/linux-master/drivers/watchdog/
H A Dixp4xx_wdt.c55 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
56 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
57 __raw_writel(wdd->timeout * iwdt->rate,
59 __raw_writel(IXP4XX_WDT_COUNT_ENABLE | IXP4XX_WDT_RESET_ENABLE,
61 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
70 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
71 __raw_writel(0, iwdt->base + IXP4XX_OSWE_OFFSET);
72 __raw_writel(0, iwdt->base + IXP4XX_OSWK_OFFSET);
92 __raw_writel(IXP4XX_WDT_KEY, iwdt->base + IXP4XX_OSWK_OFFSET);
93 __raw_writel(
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H A Dtxx9wdt.c46 __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
54 __raw_writel(WD_TIMER_CLK * wdt_dev->timeout, &txx9wdt_reg->cpra);
55 __raw_writel(WD_TIMER_CCD, &txx9wdt_reg->ccdr);
56 __raw_writel(0, &txx9wdt_reg->tisr); /* clear pending interrupt */
57 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
59 __raw_writel(TXx9_TMWTMR_TWIE | TXx9_TMWTMR_TWC, &txx9wdt_reg->wtmr);
67 __raw_writel(TXx9_TMWTMR_WDIS, &txx9wdt_reg->wtmr);
68 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE,
/linux-master/arch/m68k/coldfire/
H A Dpci.c71 __raw_writel(PCICAR_E | addr, PCICAR);
87 __raw_writel(0, PCICAR);
103 __raw_writel(PCICAR_E | addr, PCICAR);
115 __raw_writel(cpu_to_le32(value), addr);
119 __raw_writel(0, PCICAR);
178 __raw_writel(PCIGSCR_RESET, PCIGSCR);
179 __raw_writel(0, PCITCR);
185 __raw_writel(PACR_INTMPRI | PACR_INTMINTE | PACR_EXTMPRI(0x1f) |
193 __raw_writel(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
195 __raw_writel(PCICR1_L
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H A Dsltimers.c47 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, PA(MCFSLT_SSR));
68 __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT));
69 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
89 __raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
132 __raw_writel(mcfslt_cycles_per_jiffy - 1, TA(MCFSLT_STCNT));
133 __raw_writel(MCFSLT_SCR_RUN | MCFSLT_SCR_IEN | MCFSLT_SCR_TEN,
/linux-master/sound/soc/au1x/
H A Dpsc-ac97.c78 __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
85 __raw_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
98 __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
118 __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
125 __raw_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
136 __raw_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
148 __raw_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
151 __raw_writel(0, AC97_RST(pscdata));
161 __raw_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
163 __raw_writel(PSC_CTRL_DISABL
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H A Dpsc-i2s.c149 __raw_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
159 __raw_writel(0, I2S_CFG(pscdata));
161 __raw_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
173 __raw_writel(0, I2S_CFG(pscdata));
174 __raw_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
194 __raw_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
196 __raw_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
205 __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
217 __raw_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
228 __raw_writel(
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/linux-master/drivers/infiniband/hw/mthca/
H A Dmthca_doorbell.h84 __raw_writel(((__force u32 *) &val)[0], dest);
85 __raw_writel(((__force u32 *) &val)[1], dest + 4);
97 __raw_writel(hi, dest);
98 __raw_writel(lo, dest + 4);
/linux-master/arch/arm/kernel/
H A Dv7m.c13 __raw_writel(V7M_SCB_AIRCR_VECTKEY | V7M_SCB_AIRCR_SYSRESETREQ,
/linux-master/arch/arm/mach-mmp/
H A Dplatsmp.c19 __raw_writel(__pa_symbol(secondary_startup), SW_BRANCH_VIRT_ADDR);
/linux-master/arch/sh/drivers/dma/
H A Ddma-pvr2.c43 __raw_writel(0, PVR2_DMA_LMMODE0);
60 __raw_writel(chan->dar, PVR2_DMA_ADDR);
61 __raw_writel(chan->count, PVR2_DMA_COUNT);
62 __raw_writel(chan->mode & DMA_MODE_MASK, PVR2_DMA_MODE);
H A Ddmabrg.c90 __raw_writel(dcr & ~0x00ff0003, DMABRGCR); /* ack all */
114 __raw_writel(dcr, DMABRGCR);
122 __raw_writel(dcr, DMABRGCR);
168 __raw_writel(0, DMABRGCR);
169 __raw_writel(0, DMACHCR0);
170 __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */
174 __raw_writel(or | DMAOR_BRG | DMAOR_DMEN, DMAOR);
/linux-master/arch/sh/mm/
H A Dtlb-sh3.c41 __raw_writel(vpn, MMU_PTEH);
48 __raw_writel(pteval, MMU_PTEL);
75 __raw_writel(data, addr + (i << 8));
92 __raw_writel(status, MMUCR);
H A Dcache-sh2.c33 __raw_writel(data, addr | (way << 12));
49 __raw_writel((v & CACHE_PHYSADDR_MASK),
67 __raw_writel(ccr, SH_CCR);
80 __raw_writel((v & CACHE_PHYSADDR_MASK),
/linux-master/arch/mips/pci/
H A Dops-tx4927.c64 __raw_writel(((bus->number & 0xff) << 0x10)
69 __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
84 __raw_writel((__raw_readl(&pcicptr->pcistatus) & 0x0000ffff)
130 __raw_writel(val, &pcicptr->g2pcfgdata);
243 __raw_writel(__raw_readl(&pcicptr->pciccfg)
251 __raw_writel((channel->io_resource->end - channel->io_resource->start)
265 __raw_writel(0, &pcicptr->g2pmmask[i]);
270 __raw_writel((channel->mem_resource->end
285 __raw_writel(0, &pcicptr->p2giopbase); /* 256B */
288 __raw_writel(
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/linux-master/arch/mips/kernel/
H A Dirq_txx9.c72 __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs))
83 __raw_writel((__raw_readl(ilrp) & ~(0xff << ofs))
96 __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr);
122 __raw_writel(cr, crp);
149 __raw_writel(0, &txx9_ircptr->imr);
151 __raw_writel(0, &txx9_ircptr->ilr[i]);
154 __raw_writel(0, &txx9_ircptr->cr[i]);
156 __raw_writel(TXx9_IRCER_ICE, &txx9_ircptr->cer);
157 __raw_writel(irc_elevel, &txx9_ircptr->imr);
/linux-master/include/linux/mlx4/
H A Ddoorbell.h79 __raw_writel((__force u32) val[0], dest);
80 __raw_writel((__force u32) val[1], dest + 4);
/linux-master/arch/arm/boot/compressed/
H A Dmisc-ep93xx.h18 static inline void __raw_writel(unsigned int value, unsigned int ptr) function
38 __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dintc-shx3.c23 __raw_writel(irq2evt(irq), INTACKCLR);
/linux-master/drivers/tty/serial/
H A Dapbuart.h54 #define UART_PUT_CHAR(port, v) (__raw_writel(v, APBBASE_DATA_P(port)))
56 #define UART_PUT_STATUS(port, v)(__raw_writel(v, APBBASE_STATUS_P(port)))
58 #define UART_PUT_CTRL(port, v) (__raw_writel(v, APBBASE_CTRL_P(port)))
60 #define UART_PUT_SCAL(port, v) (__raw_writel(v, APBBASE_SCALAR_P(port)))
/linux-master/drivers/net/wireless/ath/wil6210/
H A Dfw.c25 __raw_writel(val, d++);
/linux-master/arch/arm/mach-s3c/
H A Dirq-pm-s3c64xx.c92 __raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
95 __raw_writel(grp->con, S3C64XX_EINT12CON + (i * 4));
96 __raw_writel(grp->mask, S3C64XX_EINT12MASK + (i * 4));
97 __raw_writel(grp->fltcon, S3C64XX_EINT12FLTCON + (i * 4));
/linux-master/arch/sparc/include/asm/
H A Dio.h19 #define writel_be(__w, __addr) __raw_writel(__w, __addr)

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