Searched refs:OFFSET (Results 26 - 50 of 67) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dnbio_v7_11.c75 OFFSET, doorbell_index);
100 OFFSET, doorbell_index);
125 GDC0_BIF_VCN0_DOORBELL_RANGE, OFFSET,
182 GDC0_BIF_IH_DOORBELL_RANGE, OFFSET,
H A Dnbio_v7_0.c77 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
94 BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
123 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
H A Dnbio_v7_7.c75 OFFSET, doorbell_index);
96 GDC0_BIF_VCN0_DOORBELL_RANGE, OFFSET,
154 GDC0_BIF_IH_DOORBELL_RANGE, OFFSET,
H A Dnbio_v7_2.c118 OFFSET, doorbell_index);
139 GDC0_BIF_VCN0_DOORBELL_RANGE, OFFSET,
196 GDC0_BIF_IH_DOORBELL_RANGE, OFFSET,
H A Dumsch_mm_v4_0.c185 data = REG_SET_FIELD(data, VCN_AGDB_CTRL0, OFFSET,
191 data = REG_SET_FIELD(data, VCN_AGDB_CTRL1, OFFSET,
197 data = REG_SET_FIELD(data, VCN_AGDB_CTRL2, OFFSET,
203 data = REG_SET_FIELD(data, VCN_AGDB_CTRL3, OFFSET,
216 data = REG_SET_FIELD(data, VCN_UMSCH_RB_DB_CTRL, OFFSET, ring->doorbell_index);
H A Dnbio_v2_3.c122 BIF_SDMA0_DOORBELL_RANGE, OFFSET,
145 BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
194 BIF_IH_DOORBELL_RANGE, OFFSET,
H A Dnbio_v7_4.c172 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
198 BIF_MMSCH0_DOORBELL_RANGE, OFFSET,
240 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
H A Dnbio_v6_1.c98 doorbell_range = REG_SET_FIELD(doorbell_range, BIF_SDMA0_DOORBELL_RANGE, OFFSET, doorbell_index);
139 ih_doorbell_range = REG_SET_FIELD(ih_doorbell_range, BIF_IH_DOORBELL_RANGE, OFFSET, doorbell_index);
H A Dvega20_ih.c196 IH_DOORBELL_RPTR, OFFSET,
263 val = REG_SET_FIELD(val, IH_DOORBELL_RPTR, OFFSET, doorbell_index);
H A Dtonga_ih.c148 OFFSET, adev->irq.ih.doorbell_index);
H A Dvpe_v6_1.c250 doorbell_offset = REG_SET_FIELD(doorbell_offset, VPEC_QUEUE0_DOORBELL_OFFSET, OFFSET, ring->doorbell_index + i*4);
/linux-master/arch/powerpc/crypto/
H A Dpoly1305-p10le_64.S64 .macro SAVE_GPR GPR OFFSET FRAME
65 std \GPR,\OFFSET(\FRAME)
68 .macro SAVE_VRS VRS OFFSET FRAME
69 li 16, \OFFSET
73 .macro SAVE_VSX VSX OFFSET FRAME
74 li 16, \OFFSET
78 .macro RESTORE_GPR GPR OFFSET FRAME
79 ld \GPR,\OFFSET(\FRAME)
82 .macro RESTORE_VRS VRS OFFSET FRAME
83 li 16, \OFFSET
[all...]
/linux-master/drivers/xen/xen-pciback/
H A Dconf_space.h75 #define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset) macro
H A Dconf_space_quirks.c58 if (OFFSET(cfg_entry) == reg) {
/linux-master/drivers/mtd/nand/raw/
H A Dtegra_nand.c156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off)) macro
794 reg |= TIMING_TCR_TAR_TRR(OFFSET(val, 3));
799 reg |= TIMING_TCS(OFFSET(val, 2));
803 reg |= TIMING_TRP(OFFSET(val, 1)) | TIMING_TRP_RESP(OFFSET(val, 1));
805 reg |= TIMING_TWB(OFFSET(DIV_ROUND_UP(timings->tWB_max, period), 1));
806 reg |= TIMING_TWHR(OFFSET(DIV_ROUND_UP(timings->tWHR_min, period), 1));
807 reg |= TIMING_TWH(OFFSET(DIV_ROUND_UP(timings->tWH_min, period), 1));
808 reg |= TIMING_TWP(OFFSET(DIV_ROUND_UP(timings->tWP_min, period), 1));
809 reg |= TIMING_TRH(OFFSET(DIV_ROUND_U
[all...]
/linux-master/fs/cramfs/
H A Dinode.c65 #define OFFSET(x) ((x)->i_ino) macro
268 * filesystem starting at byte offset OFFSET into the filesystem.
299 blockptrs = (u32 *)(sbi->linear_virt_addr + OFFSET(inode) + pgoff * 4);
339 blockptrs = (u32 *)(sbi->linear_virt_addr + OFFSET(inode));
722 de = cramfs_read(sb, OFFSET(inode) + offset, sizeof(*de)+CRAMFS_MAXPATHLEN);
732 ino = cramino(de, OFFSET(inode) + offset);
769 int dir_off = OFFSET(dir) + offset;
826 u32 blkptr_offset = OFFSET(inode) + page->index * 4;
863 block_start = OFFSET(inode) + maxblock * 4;
/linux-master/tools/power/cpupower/debug/i386/
H A Ddump_psb.c16 #define OFFSET (0xc0000) macro
/linux-master/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h180 u8 OFFSET :1; member in struct:bcm3510_hab_cmd_ext_acquire::__anon299
205 u8 OFFSET :1; member in struct:bcm3510_hab_cmd_int_acquire::__anon301
/linux-master/drivers/gpu/drm/nouveau/dispnv50/
H A Dcorec37d.c63 NVVAL(NVC37D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 4) |
H A Dwndwc37e.c235 NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));
H A Dbase507c.c182 NVVAL(NV507C, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 2),
/linux-master/drivers/hwmon/
H A Dadt7475.c30 #define OFFSET 3 macro
423 case OFFSET:
474 case OFFSET:
477 out = data->temp[OFFSET][sattr->index] = val / 1000;
480 out = data->temp[OFFSET][sattr->index] = val / 500;
527 case OFFSET:
1126 static SENSOR_DEVICE_ATTR_2_RW(temp1_offset, temp, OFFSET, 0);
1136 static SENSOR_DEVICE_ATTR_2_RW(temp2_offset, temp, OFFSET, 1);
1147 static SENSOR_DEVICE_ATTR_2_RW(temp3_offset, temp, OFFSET, 2);
1452 data->temp[OFFSET][
[all...]
/linux-master/drivers/infiniband/hw/hfi1/
H A Dtrace.c334 KDETH_GET(eh->tid_rdma.w_data.kdeth0, OFFSET),
360 KDETH_GET(eh->tid_rdma.r_rsp.kdeth0, OFFSET),
H A Duser_sdma.c448 * KDETH.OFFSET and KDETH.OM that are passed in.
450 req->tidoffset = KDETH_GET(req->hdr.kdeth.ver_tid_offset, OFFSET) *
875 tidoff = KDETH_GET(kval, OFFSET) *
1009 * Set the KDETH.OFFSET and KDETH.OM based on size of
1016 KDETH_SET(hdr->kdeth.ver_tid_offset, OFFSET,
1102 /* KDETH.OM and KDETH.OFFSET (TID) */
/linux-master/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-pci.c299 pdata->xpcs_window = XPCS_GET_BITS(reg, PCS_V2_WINDOW_DEF, OFFSET);

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