Searched refs:L1_CACHE_SHIFT (Results 26 - 50 of 52) sorted by relevance

123

/linux-master/arch/arc/lib/
H A Dmemset-archs.S11 * instruction in case of CPU with 64B L1 data cache line (L1_CACHE_SHIFT == 6)
18 #if L1_CACHE_SHIFT == 6
/linux-master/arch/arm64/include/asm/
H A Dcache.h8 #define L1_CACHE_SHIFT (6) macro
9 #define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
/linux-master/arch/parisc/include/asm/
H A Dcache.h17 #define L1_CACHE_SHIFT 4 macro
/linux-master/arch/arc/kernel/
H A Djump_label.c32 if ((a >> L1_CACHE_SHIFT) != ((a + len - 1) >> L1_CACHE_SHIFT))
/linux-master/include/linux/
H A Dcache.h72 #define INTERNODE_CACHE_SHIFT L1_CACHE_SHIFT
/linux-master/arch/powerpc/kernel/vdso/
H A Dcacheflush.S51 srwi. r8, r8, L1_CACHE_SHIFT
/linux-master/arch/arm/mach-tegra/
H A Dreset-handler.S115 .align L1_CACHE_SHIFT
139 .align L1_CACHE_SHIFT
291 .align L1_CACHE_SHIFT
301 .align L1_CACHE_SHIFT
H A Dsleep.S113 .align L1_CACHE_SHIFT
H A Dsleep-tegra20.S173 .align L1_CACHE_SHIFT
433 .align L1_CACHE_SHIFT
H A Dsleep-tegra30.S347 .align L1_CACHE_SHIFT
590 .align L1_CACHE_SHIFT
905 .align L1_CACHE_SHIFT
/linux-master/arch/powerpc/lib/
H A Dstring_32.S17 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
H A Dchecksum_32.S121 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
H A Dcopy_32.S62 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
/linux-master/arch/arm64/lib/
H A Dcopy_template.S152 .p2align L1_CACHE_SHIFT
H A Dmemset.S117 .p2align L1_CACHE_SHIFT
/linux-master/lib/
H A Datomic64.c40 addr >>= L1_CACHE_SHIFT; local
/linux-master/arch/sh/kernel/cpu/sh3/
H A Dentry.S376 .align L1_CACHE_SHIFT
500 .align L1_CACHE_SHIFT
/linux-master/drivers/net/ethernet/qlogic/qede/
H A Dqede.h219 #define QEDE_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
/linux-master/kernel/dma/
H A Ddebug.c423 #define CACHELINE_PER_PAGE_SHIFT (PAGE_SHIFT - L1_CACHE_SHIFT)
429 (entry->offset >> L1_CACHE_SHIFT);
/linux-master/arch/arm/crypto/
H A Dchacha-neon-core.S634 .align L1_CACHE_SHIFT
/linux-master/arch/arm64/crypto/
H A Dchacha-neon-core.S796 .align L1_CACHE_SHIFT
/linux-master/drivers/parisc/
H A Dsba_iommu.c648 entries_per_cacheline = L1_CACHE_SHIFT - 3;
/linux-master/drivers/net/
H A Dmacvlan.c249 return (u32)(((unsigned long)vlan) >> L1_CACHE_SHIFT);
/linux-master/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x.h1414 #define BNX2X_RX_ALIGN_SHIFT max(6, min(8, L1_CACHE_SHIFT))
/linux-master/fs/reiserfs/
H A Dreiserfs.h2807 (((unsigned long)sb>>L1_CACHE_SHIFT) ^ \

Completed in 218 milliseconds

123